2019-12-13 09:21:43 +00:00
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/*
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2021-10-04 20:59:10 +01:00
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* Copyright (c) Atmosphère-NX
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2019-12-13 09:21:43 +00:00
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* Some macros taken from https://github.com/ARM-software/arm-trusted-firmware/blob/master/include/common/aarch64/asm_macros.S */
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Declare the exception vector table, enforcing it is aligned on a
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* 2KB boundary, as required by the ARMv8 architecture.
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* Use zero bytes as the fill value to be stored in the padding bytes
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* so that it inserts illegal AArch64 instructions. This increases
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* security, robustness and potentially facilitates debugging.
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*/
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.macro vector_base label, section_name=.vectors
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.section \section_name, "ax"
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.align 11, 0
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\label:
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.endm
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/*
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* Create an entry in the exception vector table, enforcing it is
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* aligned on a 128-byte boundary, as required by the ARMv8 architecture.
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* Use zero bytes as the fill value to be stored in the padding bytes
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* so that it inserts illegal AArch64 instructions. This increases
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* security, robustness and potentially facilitates debugging.
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*/
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.macro vector_entry label, section_name=.vectors
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.cfi_sections .debug_frame
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.section \section_name, "ax"
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.align 7, 0
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.type \label, %function
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.func \label
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.cfi_startproc
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\label:
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.endm
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/*
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* This macro verifies that the given vector doesnt exceed the
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* architectural limit of 32 instructions. This is meant to be placed
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* immediately after the last instruction in the vector. It takes the
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* vector entry as the parameter
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*/
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.macro check_vector_size since
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.endfunc
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.cfi_endproc
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.if (. - \since) > (32 * 4)
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.error "Vector exceeds 32 instructions"
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.endif
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.endm
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/* Actual Vectors for KernelLdr. */
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.global kernelldr_vectors
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vector_base kernelldr_vectors
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/* Current EL, SP0 */
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.global unknown_exception
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unknown_exception:
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vector_entry synch_sp0
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/* Just infinite loop. */
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b unknown_exception
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check_vector_size synch_sp0
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vector_entry irq_sp0
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b unknown_exception
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check_vector_size irq_sp0
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vector_entry fiq_sp0
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b unknown_exception
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check_vector_size fiq_sp0
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vector_entry serror_sp0
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b unknown_exception
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check_vector_size serror_sp0
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/* Current EL, SPx */
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vector_entry synch_spx
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b restore_tpidr_el1
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check_vector_size synch_spx
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vector_entry irq_spx
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b unknown_exception
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check_vector_size irq_spx
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vector_entry fiq_spx
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b unknown_exception
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check_vector_size fiq_spx
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vector_entry serror_spx
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b unknown_exception
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check_vector_size serror_spx
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/* Lower EL, A64 */
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vector_entry synch_a64
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b unknown_exception
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check_vector_size synch_a64
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vector_entry irq_a64
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b unknown_exception
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check_vector_size irq_a64
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vector_entry fiq_a64
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b unknown_exception
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check_vector_size fiq_a64
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vector_entry serror_a64
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b unknown_exception
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check_vector_size serror_a64
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/* Lower EL, A32 */
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vector_entry synch_a32
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b unknown_exception
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check_vector_size synch_a32
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vector_entry irq_a32
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b unknown_exception
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check_vector_size irq_a32
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vector_entry fiq_a32
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b unknown_exception
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check_vector_size fiq_a32
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vector_entry serror_a32
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b unknown_exception
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.endfunc
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.cfi_endproc
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/* To save space, insert in an unused vector segment. */
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.global restore_tpidr_el1
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.type restore_tpidr_el1, %function
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restore_tpidr_el1:
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mrs x0, tpidr_el1
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/* Make sure that TPIDR_EL1 can be dereferenced. */
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invalid_tpidr:
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cbz x0, invalid_tpidr
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/* Restore saved registers. */
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ldp x19, x20, [x0], #0x10
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ldp x21, x22, [x0], #0x10
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ldp x23, x24, [x0], #0x10
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ldp x25, x26, [x0], #0x10
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ldp x27, x28, [x0], #0x10
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ldp x29, x30, [x0], #0x10
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ldp x1, xzr, [x0], #0x10
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mov sp, x1
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mov x0, #0x1
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ret
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