2018-03-02 19:28:05 +00:00
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#include <stdint.h>
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#include "utils.h"
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#include "bootup.h"
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2018-03-02 20:16:30 +00:00
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#include "fuse.h"
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#include "flow.h"
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#include "pmc.h"
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#include "mc.h"
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#include "se.h"
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#include "masterkey.h"
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#include "configitem.h"
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#include "misc.h"
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2018-03-02 19:28:05 +00:00
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void bootup_misc_mmio(void) {
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2018-03-02 20:16:30 +00:00
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/* Initialize Fuse registers. */
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fuse_init();
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/* Verify Security Engine sanity. */
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se_set_in_context_save_mode(false);
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/* TODO: se_verify_keys_unreadable(); */
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se_validate_stored_vector();
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for (unsigned int i = 0; i < KEYSLOT_SWITCH_SESSIONKEY; i++) {
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clear_aes_keyslot(i);
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}
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for (unsigned int i = 0; i < KEYSLOT_RSA_MAX; i++) {
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clear_rsa_keyslot(i);
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}
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se_initialize_rng(KEYSLOT_SWITCH_RNGKEY);
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se_generate_random_key(KEYSLOT_SWITCH_SRKGENKEY, KEYSLOT_SWITCH_RNGKEY);
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se_generate_srk(KEYSLOT_SWITCH_SRKGENKEY);
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FLOW_CTLR_BPMP_CLUSTER_CONTROL_0 = 4; /* ACTIVE_CLUSTER_LOCK. */
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FLOW_CTLR_FLOW_DBG_QUAL_0 = 0x10000000; /* Enable FIQ2CCPLEX */
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/* Disable Deep Power Down. */
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APBDEV_PMC_DPD_ENABLE_0 = 0;
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/* Setup MC. */
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/* TODO: What are these MC reg writes? */
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MAKE_MC_REG(0x984) = 1;
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MAKE_MC_REG(0x648) = 0;
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MAKE_MC_REG(0x64C) = 0;
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MAKE_MC_REG(0x650) = 1;
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MAKE_MC_REG(0x670) = 0;
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MAKE_MC_REG(0x674) = 0;
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MAKE_MC_REG(0x678) = 1;
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MAKE_MC_REG(0x9A0) = 0;
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MAKE_MC_REG(0x9A4) = 0;
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MAKE_MC_REG(0x9A8) = 0;
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MAKE_MC_REG(0x9AC) = 1;
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MC_SECURITY_CFG0_0 = 0;
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MC_SECURITY_CFG1_0 = 0;
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MC_SECURITY_CFG3_0 = 3;
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configure_default_carveouts();
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/* Mark registers secure world only. */
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/* Mark SATA_AUX, DTV, QSPI, SE, SATA, LA secure only. */
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 = 0x504244;
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/* By default, mark SPI1, SPI2, SPI3, SPI5, SPI6, I2C6 secure only. */
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uint32_t sec_disable_1 = 0x83700000;
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/* By default, mark SDMMC3, DDS, DP2 secure only. */
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uint32_t sec_disable_2 = 0x304;
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uint64_t hardware_type = configitem_get_hardware_type();
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if (hardware_type != 1) {
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/* Also mark I2C5 secure only, */
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sec_disable_1 |= 0x20000000;
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}
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if (hardware_type != 0 && mkey_get_revision() >= MASTERKEY_REVISION_400_CURRENT) {
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/* Starting on 4.x on non-dev units, mark UARTB, UARTC, SPI4, I2C3 secure only. */
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sec_disable_1 |= 0x10806000;
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/* Starting on 4.x on non-dev units, mark SDMMC1 secure only. */
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sec_disable_2 |= 1;
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}
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 = sec_disable_1;
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0 = sec_disable_2;
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2018-03-02 19:28:05 +00:00
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/* TODO */
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/* Initialize the PMC secure scratch registers, initialize MISC registers, */
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/* And assign "se_operation_completed" to Interrupt 0x5A. */
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}
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void setup_4x_mmio(void) {
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/* TODO */
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}
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