2018-09-07 16:00:13 +01:00
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/*
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* Copyright (c) 2018 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2018-02-23 09:12:38 +00:00
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#ifndef EXOSPHERE_MC_H
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#define EXOSPHERE_MC_H
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#include <stdint.h>
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2018-02-24 16:13:42 +00:00
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#include "memory_map.h"
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2018-02-23 09:12:38 +00:00
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/* Exosphere driver for the Tegra X1 Memory Controller. */
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2018-02-26 21:09:35 +00:00
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static inline uintptr_t get_mc_base(void) {
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return MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_MC);
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}
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#define MC_BASE (get_mc_base())
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2018-02-23 09:12:38 +00:00
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2018-03-03 19:23:13 +00:00
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#define MAKE_MC_REG(n) MAKE_REG32(MC_BASE + n)
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2018-03-02 20:16:30 +00:00
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2018-09-05 04:55:46 +01:00
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#define MC_SMMU_CONFIG_0 MAKE_MC_REG(0x010)
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#define MC_SMMU_TLB_CONFIG_0 MAKE_MC_REG(0x014)
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#define MC_SMMU_PTC_CONFIG_0 MAKE_MC_REG(0x018)
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#define MC_SMMU_PTB_ASID_0 MAKE_MC_REG(0x01C)
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#define MC_SMMU_PTB_DATA_0 MAKE_MC_REG(0x020)
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#define MC_SMMU_TLB_FLUSH_0 MAKE_MC_REG(0x030)
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#define MC_SMMU_PTC_FLUSH_0 MAKE_MC_REG(0x034)
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#define MC_SMMU_AFI_ASID_0 MAKE_MC_REG(0x238)
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#define MC_SMMU_AVPC_ASID_0 MAKE_MC_REG(0x23C)
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#define MC_SMMU_TRANSLATION_ENABLE_0_0 MAKE_MC_REG(0x228)
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#define MC_SMMU_TRANSLATION_ENABLE_1_0 MAKE_MC_REG(0x22C)
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#define MC_SMMU_TRANSLATION_ENABLE_2_0 MAKE_MC_REG(0x230)
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#define MC_SMMU_TRANSLATION_ENABLE_3_0 MAKE_MC_REG(0x234)
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#define MC_SMMU_TRANSLATION_ENABLE_4_0 MAKE_MC_REG(0xB98)
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2018-03-25 22:05:08 +01:00
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#define MC_SMMU_PPCS1_ASID_0 MAKE_MC_REG(0x298)
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2018-03-02 20:16:30 +00:00
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#define MC_SECURITY_CFG0_0 MAKE_MC_REG(0x070)
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#define MC_SECURITY_CFG1_0 MAKE_MC_REG(0x074)
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#define MC_SECURITY_CFG3_0 MAKE_MC_REG(0x9BC)
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2018-02-23 09:12:38 +00:00
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#define CARVEOUT_ID_MIN 1
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#define CARVEOUT_ID_MAX 5
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#define KERNEL_CARVEOUT_SIZE_MAX 0x1FFE0000
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typedef struct {
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uint32_t allowed_clients;
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uint32_t paddr_low;
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uint32_t paddr_high;
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uint32_t size_big_pages;
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uint32_t flags_0;
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uint32_t flags_1;
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uint32_t flags_2;
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uint32_t flags_3;
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uint32_t flags_4;
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uint32_t flags_5;
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uint32_t flags_6;
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uint32_t flags_7;
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uint32_t flags_8;
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uint32_t flags_9;
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2018-05-22 03:14:06 +01:00
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uint8_t padding[0x18];
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2018-02-23 09:12:38 +00:00
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} security_carveout_t;
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volatile security_carveout_t *get_carveout_by_id(unsigned int carveout);
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void configure_default_carveouts(void);
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2018-09-09 07:51:52 +01:00
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void configure_gpu_ucode_carveout(void);
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2018-02-23 09:12:38 +00:00
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void configure_kernel_carveout(unsigned int carveout_id, uint64_t address, uint64_t size);
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2018-02-24 16:13:42 +00:00
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#endif
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