mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-12-18 08:22:04 +00:00
Use provided __libc_init_array and __libc_fini_array, bugfixes
This commit is contained in:
parent
24b15dad40
commit
0258324872
6 changed files with 49 additions and 53 deletions
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@ -2,12 +2,6 @@
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#include "mmu.h"
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#include "mmu.h"
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#include "memory_map.h"
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#include "memory_map.h"
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extern void (*const __preinit_array_start[])(void);
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extern void (*const __preinit_array_end[])(void);
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extern void ( *const __init_array_start[])(void);
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extern void (*const __init_array_end[])(void);
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extern void _init(void);
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extern const uint8_t __start_cold[];
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extern const uint8_t __start_cold[];
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extern const uint8_t __warmboot_crt0_start__[], __warmboot_crt0_end__[], __warmboot_crt0_lma__[];
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extern const uint8_t __warmboot_crt0_start__[], __warmboot_crt0_end__[], __warmboot_crt0_lma__[];
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@ -126,15 +120,6 @@ __attribute__((target("cmodel=large"), noinline)) static void copy_other_section
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copy_lma_to_vma(__vectors_start__, __vectors_lma__, __vectors_end__ - __vectors_start__);
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copy_lma_to_vma(__vectors_start__, __vectors_lma__, __vectors_end__ - __vectors_start__);
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}
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}
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__attribute__((target("cmodel=large"), noinline)) static void __libc_init_array(void) {
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/* On the stock secmon the init array lives in crt0 rodata, but whatever... */
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for (size_t i = 0; i < __preinit_array_end - __preinit_array_start; i++)
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__preinit_array_start[i]();
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//_init(); /* FIXME: do we have this gcc-provided symbol if we build with -nostartfiles? */
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for (size_t i = 0; i < __init_array_end - __init_array_start; i++)
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__init_array_start[i]();
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}
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void coldboot_init(void) {
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void coldboot_init(void) {
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/* TODO: Set NX BOOTLOADER clock time field */
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/* TODO: Set NX BOOTLOADER clock time field */
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copy_warmboot_crt0();
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copy_warmboot_crt0();
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@ -150,5 +135,4 @@ void coldboot_init(void) {
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/* At this point we can access the mapped segments */
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/* At this point we can access the mapped segments */
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/* TODO: zero-initialize the cpu context */
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/* TODO: zero-initialize the cpu context */
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/* Nintendo clears the (emtpy) pk2ldr's BSS section, but we embed it 0-filled in the binary */
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/* Nintendo clears the (emtpy) pk2ldr's BSS section, but we embed it 0-filled in the binary */
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__libc_init_array(); /* construct global objects */
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}
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}
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@ -4,28 +4,24 @@
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#include "memory_map.h"
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#include "memory_map.h"
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#include "cache.h"
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#include "cache.h"
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/*
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extern void (*__fini_array_start[])(void);
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extern void (*__fini_array_end[])(void);
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extern void _fini(void);*/
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extern uint8_t __pk2ldr_start__[], __pk2ldr_end__[];
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extern uint8_t __pk2ldr_start__[], __pk2ldr_end__[];
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extern void __jump_to_lower_el(uint64_t arg, uintptr_t ep, unsigned int el);
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extern void __jump_to_lower_el(uint64_t arg, uintptr_t ep, unsigned int el);
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void _init(void);
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void _fini(void);
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void coldboot_main(void);
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void coldboot_main(void);
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#if 0
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void _init(void) {
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/* Needs to be called for EL3->EL3 chainloading (and only in that case). TODO: use it */
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/* Stubbed. Should have been provided by gcc but we have set -nostartfiles */
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__attribute__((used)) static void __libc_fini_array(void) {
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}
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for (size_t i = __fini_array_end - __fini_array_start; i > 0; i--)
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__fini_array_start[i - 1]();
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void _fini(void) {
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_fini(); /* FIXME: do we have this gcc-provided symbol if we build with -nostartfiles? */
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/* Stubbed. Should have been provided by gcc but we have set -nostartfiles */
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}
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}
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#endif
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void coldboot_main(void) {
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void coldboot_main(void) {
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#if 0
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uintptr_t *mmu_l3_table = (uintptr_t *)TZRAM_GET_SEGMENT_ADDRESS(TZRAM_SEGMENT_ID_L3_TRANSLATION_TABLE);
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uintptr_t *mmu_l3_table = (uintptr_t *)TZRAM_GET_SEGMENT_ADDRESS(TZRAM_SEGMENT_ID_L3_TRANSLATION_TABLE);
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uintptr_t pk2ldr = TZRAM_GET_SEGMENT_ADDRESS(TZRAM_SEGMENT_ID_PK2LDR);
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uintptr_t pk2ldr = TZRAM_GET_SEGMENT_ADDRESS(TZRAM_SEGMENT_ID_PK2LDR);
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@ -33,7 +29,6 @@ void coldboot_main(void) {
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memset((void *)pk2ldr, 0, __pk2ldr_end__ - __pk2ldr_start__);
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memset((void *)pk2ldr, 0, __pk2ldr_end__ - __pk2ldr_start__);
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mmu_unmap_range(3, mmu_l3_table, pk2ldr, __pk2ldr_end__ - __pk2ldr_start__);
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mmu_unmap_range(3, mmu_l3_table, pk2ldr, __pk2ldr_end__ - __pk2ldr_start__);
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tlb_invalidate_all_inner_shareable();
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tlb_invalidate_all_inner_shareable();
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#endif
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/* TODO: stuff & jump to lower EL */
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/* TODO: stuff & jump to lower EL */
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}
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}
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@ -54,7 +54,7 @@
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#define MMIO_BASE 0x1F0080000ull
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#define MMIO_BASE 0x1F0080000ull
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#define LP0_ENTRY_RAM_SEGMENT_BASE (MMIO_BASE + 0x000100000ull)
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#define LP0_ENTRY_RAM_SEGMENT_BASE (MMIO_BASE + 0x000100000ull)
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#define WARMBOOT_RAM_SEGMENT_BASE (LP0_ENTRY_RAM_SEGMENT_BASE + 0x000047000ull) /* increment seems to be arbitrary ? */
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#define WARMBOOT_RAM_SEGMENT_BASE (LP0_ENTRY_RAM_SEGMENT_BASE + 0x000047000ull) /* increment seems to be arbitrary ? */
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#define TZRAM_SEGMENT_BASE (MMIO_BASE + 0x0001E0000ull)
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#define TZRAM_SEGMENT_BASE (MMIO_BASE + 0x000160000ull)
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#define IDENTITY_MAPPING_IRAM_CD 0
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#define IDENTITY_MAPPING_IRAM_CD 0
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#define IDENTITY_MAPPING_TZRAM 1
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#define IDENTITY_MAPPING_TZRAM 1
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@ -151,21 +151,21 @@ static inline void mmu_unmap(unsigned int level, uintptr_t *tbl, uintptr_t base_
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static inline void mmu_map_block_range(unsigned int level, uintptr_t *tbl, uintptr_t base_addr, uintptr_t phys_addr, size_t size, uint64_t attrs) {
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static inline void mmu_map_block_range(unsigned int level, uintptr_t *tbl, uintptr_t base_addr, uintptr_t phys_addr, size_t size, uint64_t attrs) {
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size = ((size + (BITL(MMU_Lx_SHIFT(level)) - 1)) >> MMU_Lx_SHIFT(level)) << MMU_Lx_SHIFT(level);
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size = ((size + (BITL(MMU_Lx_SHIFT(level)) - 1)) >> MMU_Lx_SHIFT(level)) << MMU_Lx_SHIFT(level);
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for(size_t offset = 0; offset < size; offset += MMU_Lx_SHIFT(level)) {
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for(size_t offset = 0; offset < size; offset += BITL(MMU_Lx_SHIFT(level))) {
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mmu_map_block(level, tbl, base_addr + offset, phys_addr + offset, attrs);
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mmu_map_block(level, tbl, base_addr + offset, phys_addr + offset, attrs);
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}
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}
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}
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}
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static inline void mmu_map_page_range(uintptr_t *tbl, uintptr_t base_addr, uintptr_t phys_addr, size_t size, uint64_t attrs) {
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static inline void mmu_map_page_range(uintptr_t *tbl, uintptr_t base_addr, uintptr_t phys_addr, size_t size, uint64_t attrs) {
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size = ((size + (BITL(MMU_Lx_SHIFT(3)) - 1)) >> MMU_Lx_SHIFT(3)) << MMU_Lx_SHIFT(3);
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size = ((size + (BITL(MMU_Lx_SHIFT(3)) - 1)) >> MMU_Lx_SHIFT(3)) << MMU_Lx_SHIFT(3);
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for(size_t offset = 0; offset < size; offset += MMU_Lx_SHIFT(3)) {
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for(size_t offset = 0; offset < size; offset += BITL(MMU_Lx_SHIFT(3))) {
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mmu_map_page(tbl, base_addr + offset, phys_addr + offset, attrs);
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mmu_map_page(tbl, base_addr + offset, phys_addr + offset, attrs);
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}
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}
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}
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}
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static inline void mmu_unmap_range(unsigned int level, uintptr_t *tbl, uintptr_t base_addr, size_t size) {
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static inline void mmu_unmap_range(unsigned int level, uintptr_t *tbl, uintptr_t base_addr, size_t size) {
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size = ((size + (BITL(MMU_Lx_SHIFT(level)) - 1)) >> MMU_Lx_SHIFT(level)) << MMU_Lx_SHIFT(level);
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size = ((size + (BITL(MMU_Lx_SHIFT(level)) - 1)) >> MMU_Lx_SHIFT(level)) << MMU_Lx_SHIFT(level);
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for(size_t offset = 0; offset < size; offset += MMU_Lx_SHIFT(level)) {
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for(size_t offset = 0; offset < size; offset += BITL(MMU_Lx_SHIFT(level))) {
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mmu_unmap(level, tbl, base_addr + offset);
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mmu_unmap(level, tbl, base_addr + offset);
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}
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}
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}
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}
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@ -1,5 +1,19 @@
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/* For some reason GAS doesn't know about it, even with .cpu cortex-a57 */
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/* For some reason GAS doesn't know about it, even with .cpu cortex-a57 */
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#define cpuactlr_el1 s3_1_c15_c2_0
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#define cpuactlr_el1 s3_1_c15_c2_0
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.macro RESET_CORE
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mov x0, #(1 << 63)
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msr cpuactlr_el1, x0 /* disable regional clock gating */
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isb
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mov x0, #3
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msr rmr_el3, x0
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isb
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dsb sy
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/* Nintendo forgot to copy-paste the branch instruction below. */
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1:
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wfi
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b 1b
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.endm
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.macro ERRATUM_INVALIDATE_BTB_AT_BOOT
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.macro ERRATUM_INVALIDATE_BTB_AT_BOOT
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/* Nintendo copy-pasted https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/nvidia/tegra/common/aarch64/tegra_helpers.S#L312 */
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/* Nintendo copy-pasted https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/nvidia/tegra/common/aarch64/tegra_helpers.S#L312 */
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/*
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/*
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mov x0, xzr
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mov x0, xzr
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msr oslar_el1, x0
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msr oslar_el1, x0
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mov x0, #(1 << 63)
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RESET_CORE
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msr cpuactlr_el1, x0 /* disable regional clock gating */
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isb
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mov x0, #3
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msr rmr_el3, x0
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isb
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dsb sy
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/* Nintendo forgot to copy-paste the branch instruction below. */
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1:
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wfi
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b 1b
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.rept 65
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.rept 65
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nop /* guard against speculative excecution */
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nop /* guard against speculative excecution */
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.endr
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.endr
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ERRATUM_INVALIDATE_BTB_AT_BOOT
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ERRATUM_INVALIDATE_BTB_AT_BOOT
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msr spsel, #0
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msr spsel, #0
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bl get_coldboot_crt0_stack_address /* should be optimized so it doesn't make function calls */
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bl get_coldboot_crt0_stack_address
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mov sp, x0
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mov sp, x0
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bl coldboot_init
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bl coldboot_init
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ldr x16, =__jump_to_main_cold
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ldr x16, =__jump_to_main_cold
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/* For some reasons, Nintendo uses spsel, #1 here, causing issues if an exception occurs */
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/* For some reasons, Nintendo uses spsel, #1 here, causing issues if an exception occurs */
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msr spsel, #0
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msr spsel, #0
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bl get_warmboot_crt0_stack_address /* should be optimized so it doesn't make function calls */
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bl get_warmboot_crt0_stack_address
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mov sp, x0
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mov sp, x0
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bl warmboot_init
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bl warmboot_init
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ldr x16, =__jump_to_main_warm
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ldr x16, =__jump_to_main_warm
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.align 4
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.align 4
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.section .text.__jump_to_main_cold, "ax", %progbits
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.section .text.__jump_to_main_cold, "ax", %progbits
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__jump_to_main_cold:
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__jump_to_main_cold:
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/* This is inspired by Nintendo's code but significantly different */
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bl __set_exception_entry_stack_pointer
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bl __set_exception_entry_stack_pointer
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bl get_pk2ldr_stack_address
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bl get_pk2ldr_stack_address
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mov sp, x0
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mov sp, x0
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/*
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Normally Nintendo calls it in crt0, but it's fine to do that here
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note that package2.c shouldn't have constructed objects, because we
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call __libc_fini_array after load_package2 has been cleared, on EL3
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to EL3 chainload.
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*/
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bl __libc_init_array
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bl load_package2
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bl load_package2
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mov w0, #3 /* use core3 stack temporarily */
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mov w0, #3 /* use core3 stack temporarily */
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bl get_exception_entry_stack_address
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bl get_exception_entry_stack_address
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mov sp, x0
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mov sp, x0
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b coldboot_main
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bl coldboot_main
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/* If we ever return, it's to chainload an EL3 payload */
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bl __libc_fini_array
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/* Reset the core (only one is running on coldboot) */
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RESET_CORE
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.section .text.__jump_to_main_warm, "ax", %progbits
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.section .text.__jump_to_main_warm, "ax", %progbits
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__jump_to_main_warm:
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__jump_to_main_warm:
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@ -127,7 +144,7 @@ __set_exception_entry_stack_pointer:
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mrs x17, spsel
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mrs x17, spsel
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mrs x0, mpidr_el1
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mrs x0, mpidr_el1
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and w0, w0, #3
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and w0, w0, #3
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bl get_exception_entry_stack_address /* should be optimized so it doesn't make function calls */
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bl get_exception_entry_stack_address
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msr spsel, #1
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msr spsel, #1
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mov sp, x0
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mov sp, x0
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msr spsel, x17
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msr spsel, x17
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@ -12,7 +12,7 @@ void invalidate_icache_all_tzram_pa(void) {
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}
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}
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uintptr_t get_warmboot_crt0_stack_address(void) {
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uintptr_t get_warmboot_crt0_stack_address(void) {
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return TZRAM_GET_SEGMENT_ADDRESS(TZRAM_SEGMENT_ID_CORE3_STACK) + 0x800;
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return TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_CORE012_STACK) + 0x800;
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}
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}
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void warmboot_init(void) {
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void warmboot_init(void) {
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