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dmnt-cheat: Add Save/Restore register mask opcode
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477bee2e4c
commit
08a2f02a7c
2 changed files with 43 additions and 0 deletions
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@ -194,6 +194,13 @@ void DmntCheatVm::LogOpcode(const CheatVmOpcode *opcode) {
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this->LogToDebugFile("Src Idx: %x\n", opcode->save_restore_reg.src_index);
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this->LogToDebugFile("Is Save: %d\n", opcode->save_restore_reg.is_save);
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break;
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case CheatVmOpcodeType_SaveRestoreRegisterMask:
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this->LogToDebugFile("Opcode: Save or Restore Register Mask\n");
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this->LogToDebugFile("Is Save: %d\n", opcode->save_restore_regmask.is_save);
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for (size_t i = 0; i < NumRegisters; i++) {
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this->LogToDebugFile("Act[%02x]: %d\n", i, opcode->save_restore_regmask.should_save_or_restore[i]);
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}
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break;
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default:
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this->LogToDebugFile("Unknown opcode: %x\n", opcode->opcode);
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break;
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@ -481,6 +488,18 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode *out) {
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opcode.save_restore_reg.is_save = ((first_dword >> 4) & 0xF) != 0;
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}
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break;
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case CheatVmOpcodeType_SaveRestoreRegisterMask:
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{
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/* C2x0XXXX */
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/* C2 = opcode 0xC2 */
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/* x = 1 if saving, 0 if restoring. */
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/* X = 16-bit bitmask, bit i --> save or restore register i. */
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opcode.save_restore_regmask.is_save = ((first_dword >> 20) & 0xF) != 0;
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for (size_t i = 0; i < NumRegisters; i++) {
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opcode.save_restore_regmask.should_save_or_restore[i] = (first_dword & (1u << i)) != 0;
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}
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}
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break;
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case CheatVmOpcodeType_ExtendedWidth:
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default:
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/* Unrecognized instruction cannot be decoded. */
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@ -996,6 +1015,23 @@ void DmntCheatVm::Execute(const CheatProcessMetadata *metadata) {
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this->registers[cur_opcode.save_restore_reg.dst_index] = this->saved_values[cur_opcode.save_restore_reg.src_index];
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}
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break;
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case CheatVmOpcodeType_SaveRestoreRegisterMask:
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/* Save or restore register mask. */
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u64 *src;
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u64 *dst;
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if (cur_opcode.save_restore_regmask.is_save) {
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src = this->registers;
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dst = this->saved_values;
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} else {
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src = this->registers;
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dst = this->saved_values;
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}
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for (size_t i = 0; i < NumRegisters; i++) {
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if (cur_opcode.save_restore_regmask.should_save_or_restore[i]) {
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dst[i] = src[i];
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}
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}
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break;
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default:
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/* By default, we do a no-op. */
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break;
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@ -44,6 +44,7 @@ enum CheatVmOpcodeType : u32 {
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/* Extended width opcodes. */
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CheatVmOpcodeType_BeginRegisterConditionalBlock = 0xC0,
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CheatVmOpcodeType_SaveRestoreRegister = 0xC1,
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CheatVmOpcodeType_SaveRestoreRegisterMask = 0xC2,
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};
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enum MemoryAccessType : u32 {
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@ -198,6 +199,11 @@ struct SaveRestoreRegisterOpcode {
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bool is_save;
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};
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struct SaveRestoreRegisterMaskOpcode {
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bool is_save;
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bool should_save_or_restore[0x10];
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};
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struct CheatVmOpcode {
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CheatVmOpcodeType opcode;
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bool begin_conditional_block;
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@ -215,6 +221,7 @@ struct CheatVmOpcode {
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StoreRegisterToAddressOpcode str_register;
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BeginRegisterConditionalOpcode begin_reg_cond;
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SaveRestoreRegisterOpcode save_restore_reg;
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SaveRestoreRegisterMaskOpcode save_restore_regmask;
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};
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};
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