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thermosphere: add hypervisor timer code

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This commit is contained in:
TuxSH 2020-01-09 19:24:05 +00:00
parent 3d3a9925b9
commit 1eb60a2a52
10 changed files with 169 additions and 17 deletions
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2
thermosphere/Makefile
View file

@ -144,7 +144,7 @@ ifeq ($(PLATFORM), qemu)
export QEMU := qemu-system-aarch64
QEMUFLAGS := -nographic -machine virt,virtualization=on,gic-version=2 -cpu cortex-a57 -smp 4 -m 1024\
QEMUFLAGS := -nographic -machine virt,virtualization=on,accel=tcg,gic-version=2 -cpu cortex-a57 -smp 4 -m 1024\
-kernel thermosphere.elf -d unimp,guest_errors -semihosting-config enable,target=native -serial mon:stdio
qemu: all

4
thermosphere/src/irq.c
View file

@ -18,6 +18,7 @@
#include "core_ctx.h"
#include "debug_log.h"
#include "vgic.h"
#include "timer.h"
IrqManager g_irqManager = {0};
@ -183,6 +184,9 @@ void handleIrqException(ExceptionStackFrame *frame, bool isLowerEl, bool isA32)
case GIC_IRQID_MAINTENANCE:
isMaintenanceInterrupt = true;
break;
case TIMER_IRQID(CURRENT_TIMER):
timerInterruptHandler();
break;
default:
isGuestInterrupt = irqId >= 16;
break;

12
thermosphere/src/irq.h
View file

@ -77,5 +77,15 @@ static inline bool irqIsGuest(u16 id)
return false;
}
return id != GIC_IRQID_MAINTENANCE && id != GIC_IRQID_HYP_TIMER;
bool ret = id != GIC_IRQID_MAINTENANCE && id != GIC_IRQID_NS_PHYS_HYP_TIMER;
#if GIC_IRQID_NS_VIRT_HYP_TIMER != GIC_IRQID_SPURIOUS
ret = ret && id != GIC_IRQID_NS_VIRT_HYP_TIMER;
#endif
#if GIC_IRQID_SEC_PHYS_HYP_TIMER != GIC_IRQID_SPURIOUS
ret = ret && id != GIC_IRQID_SEC_PHYS_HYP_TIMER;
#endif
#if GIC_IRQID_SEC_VIRT_HYP_TIMER != GIC_IRQID_SPURIOUS
ret = ret && id != GIC_IRQID_SEC_VIRT_HYP_TIMER;
#endif
return ret;
}

3
thermosphere/src/main.c
View file

@ -11,7 +11,7 @@
#include "single_step.h"
#include "breakpoints.h"
#include "watchpoints.h"
#include "timer.h"
#include "irq.h"
extern const u8 __start__[];
@ -41,6 +41,7 @@ void thermosphereMain(ExceptionStackFrame *frame)
{
enableTraps();
enableBreakpointsAndWatchpoints();
timerInit();
initIrq();
if (currentCoreCtx->isBootCore) {

9
thermosphere/src/platform/qemu/interrupt_config.h
View file

@ -23,13 +23,18 @@
#define GIC_IRQID_PMU 23
#define GIC_IRQID_MAINTENANCE 25
#define GIC_IRQID_HYP_TIMER 26
#define GIC_IRQID_VIRT_TIMER 27
#define GIC_IRQID_NS_PHYS_HYP_TIMER 26
#define GIC_IRQID_NS_VIRT_TIMER 27
//#define GIC_IRQID_LEGACY_NFIQ 28 not defined?
#define GIC_IRQID_SEC_PHYS_TIMER 29
#define GIC_IRQID_NS_PHYS_TIMER 30
//#define GIC_IRQID_LEGACY_NIRQ 31 not defined?
#define GIC_IRQID_NS_VIRT_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 28. Unimplemented
#define GIC_IRQID_SEC_PHYS_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 20. Unimplemented
#define GIC_IRQID_SEC_VIRT_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 19. Unimplemented
static inline void initGicV2Pointers(ArmGicV2 *gic)
{
gic->gicd = (volatile ArmGicV2Distributor *)0x08000000ull;

7
thermosphere/src/platform/tegra/interrupt_config.h
View file

@ -22,13 +22,16 @@
#define MAX_NUM_REGISTERED_INTERRUPTS 512
#define GIC_IRQID_MAINTENANCE 25
#define GIC_IRQID_HYP_TIMER 26
#define GIC_IRQID_VIRT_TIMER 27
#define GIC_IRQID_NS_PHYS_HYP_TIMER 26
#define GIC_IRQID_NS_VIRT_TIMER 27
#define GIC_IRQID_LEGACY_NFIQ 28
#define GIC_IRQID_SEC_PHYS_TIMER 29
#define GIC_IRQID_NS_PHYS_TIMER 30
#define GIC_IRQID_LEGACY_NIRQ 31
#define GIC_IRQID_NS_VIRT_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 28. Unimplemented
#define GIC_IRQID_SEC_PHYS_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 20. Unimplemented
#define GIC_IRQID_SEC_VIRT_HYP_TIMER GIC_IRQID_SPURIOUS // SBSA: 19. Unimplemented
static inline void initGicV2Pointers(ArmGicV2 *gic)
{

4
thermosphere/src/sysreg.h
View file

@ -432,8 +432,8 @@
__val; \
})
#define SET_SYSREG(reg, val) do { u64 temp_reg = (val); __asm__ __volatile__ ("msr " #reg ", %0" :: "r"(temp_reg) : "memory"); } while(false)
#define SET_SYSREG_IMM(reg, imm) do { __asm__ __volatile__ ("msr " #reg ", %0" :: "I"(imm) : "memory"); } while(false)
#define SET_SYSREG(reg, val) do { u64 temp_reg = (val); __asm__ __volatile__ ("msr " STRINGIZE(reg) ", %0" :: "r"(temp_reg) : "memory"); } while(false)
#define SET_SYSREG_IMM(reg, imm) do { __asm__ __volatile__ ("msr " STRINGIZE(reg) ", %0" :: "I"(imm) : "memory"); } while(false)
#define SYSREG_OP1_AARCH32_AUTO 0
#define SYSREG_OP1_AARCH64_EL1 0

38
thermosphere/src/timer.c Normal file
View file

@ -0,0 +1,38 @@
/*
* Copyright (c) 2019 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "timer.h"
#include "irq.h"
u64 g_timerFreq = 0;
void timerInit(void)
{
timerSetInterruptStatus(false, false);
if (currentCoreCtx->isBootCore) {
g_timerFreq = GET_SYSREG(cntfrq_el0);
}
}
void timerInterruptHandler(void)
{
// Disable timer interrupts until reprogrammed
timerSetInterruptStatus(false, false);
// For fun
DEBUG("EL2 [core %d]: Timer interrupt at %lums\n", (int)currentCoreCtx->coreId, timerGetSystemTimeMs());
timerSetTimeoutMs(1000);
}

91
thermosphere/src/timer.h Normal file
View file

@ -0,0 +1,91 @@
/*
* Copyright (c) 2019 Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#pragma once
#include "utils.h"
#include "sysreg.h"
#include "platform/interrupt_config.h"
#define SECTONSECS 1000000000ull
#define SECTOMSECS 1000ull
// All generic timers possibly defined in the Arm architecture:
// (suffix, time source suffix, level, irqid)
#define NS_PHYS_TIMER (p, p, 0, GIC_IRQID_NS_PHYS_TIMER)
#define NS_VIRT_TIMER (v, v, 0, GIC_IRQID_NS_VIRT_TIMER)
#define NS_PHYS_HYP_TIMER (hp, p, 2, GIC_IRQID_NS_PHYS_HYP_TIMER)
#define NS_VIRT_HYP_TIMER (hv, v, 2, GIC_IRQID_NS_VIRT_HYP_TIMER)
#define SEC_PHYS_TIMER (ps, p, 1, GIC_IRQID_SEC_PHYS_TIMER)
#define SEC_PHYS_HYP_TIMER (hps, p, 2, GIC_IRQID_SEC_PHYS_HYP_TIMER)
#define SEC_VIRT_HYP_TIMER (hvs, v, 2, GIC_IRQID_SEC_VIRT_HYP_TIMER)
#define TIMER_IRQID_FIELDS(ign, ign2, ign3, id) id
#define TIMER_COUNTER_REG_FIELDS(ign, ts, ign2, ign3) cnt##ts##ct_el0
#define TIMER_CTL_REG_FIELDS(t, ign, el, ign2) cnt##t##_ctl_el##el
#define TIMER_CVAL_REG_FIELDS(t, ign, el, ign2) cnt##t##_cval_el##el
#define TIMER_TVAL_REG_FIELDS(t, ign, el, ign2) cnt##t##_tval_el##el
#define TIMER_IRQID(name) EVAL(TIMER_IRQID_FIELDS name)
#define TIMER_COUNTER_REG(name) EVAL(TIMER_COUNTER_REG_FIELDS name)
#define TIMER_CTL_REG(name) EVAL(TIMER_CTL_REG_FIELDS name)
#define TIMER_CVAL_REG(name) EVAL(TIMER_CVAL_REG_FIELDS name)
#define TIMER_TVAL_REG(name) EVAL(TIMER_TVAL_REG_FIELDS name)
#define CURRENT_TIMER NS_PHYS_HYP_TIMER
extern u64 g_timerFreq;
void timerInit(void);
void timerInterruptHandler(void);
static inline u64 timerGetSystemTick(void)
{
return GET_SYSREG(TIMER_COUNTER_REG(CURRENT_TIMER));
}
static inline u64 timerGetSystemTimeNs(void)
{
return timerGetSystemTick() * SECTONSECS / g_timerFreq;
}
static inline u64 timerGetSystemTimeMs(void)
{
return timerGetSystemTick() * SECTOMSECS / g_timerFreq;
}
static inline void timerSetInterruptStatus(bool enabled, bool masked)
{
u32 ebit = enabled ? BIT(0) : 0;
u32 mbit = masked ? BIT(1) : 0;
SET_SYSREG(TIMER_CTL_REG(CURRENT_TIMER), mbit | ebit);
}
static inline void timerSetTimeoutTicks(u64 ticks)
{
SET_SYSREG(TIMER_CVAL_REG(CURRENT_TIMER), timerGetSystemTick() + ticks);
timerSetInterruptStatus(true, false);
}
static inline void timerSetTimeoutNs(u64 ns)
{
timerSetTimeoutTicks(ns * g_timerFreq / SECTONSECS);
}
static inline void timerSetTimeoutMs(u64 ms)
{
timerSetTimeoutTicks(ms * g_timerFreq / SECTOMSECS);
}

2
thermosphere/src/utils.h
View file

@ -46,7 +46,7 @@
static inline u##sz __##op##sz(u##sz n)\
{\
u##sz res;\
__asm__ __volatile__ (#op " %" #regalloc "[res], %" #regalloc "[n]" : [res] "=r" (res) : [n] "r" (n));\
__asm__ __volatile__ (STRINGIZE(op) " %" STRINGIZE(regalloc) "[res], %" STRINGIZE(regalloc) "[n]" : [res] "=r" (res) : [n] "r" (n));\
return res;\
}