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fusee-cpp: minor fixes (thanks @hexkyz)
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parent
349a16ce39
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3b460e94d4
2 changed files with 4 additions and 4 deletions
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@ -153,7 +153,7 @@ namespace ams::nxboot {
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CLK_RST_REG_BITS_VALUE(PLLM_BASE_PLLM_DIVN, params->PllMFeedbackDivider),
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CLK_RST_REG_BITS_VALUE(PLLM_BASE_PLLM_DIVM, params->PllMInputDivider));
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/* Wait 300us ffor stability. */
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/* Wait 300us for stability. */
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const auto stable_time = util::GetMicroSeconds() + 300;
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while (true) {
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if (reg::HasValue(CLKRST + CLK_RST_CONTROLLER_PLLM_BASE, CLK_RST_REG_BITS_ENUM(PLLM_BASE_PLLM_LOCK, LOCK))) {
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@ -218,9 +218,9 @@ namespace ams::nxboot {
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/* Set HOLD_CKE_LOW_EN. */
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reg::ReadWrite(PMC + APBDEV_PMC_CNTRL2, PMC_REG_BITS_ENUM(CNTRL2_HOLD_CKE_LOW_EN, ENABLE));
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/* Set bit 25 in APBDEV_PMC_SCRATCH188. */
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/* NOTE: This seems like a bug? It doesn't ever get used. */
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reg::ReadWrite(PMC + APBDEV_PMC_SCRATCH188, REG_BITS_VALUE(25, 1, 1));
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/* Set CFG2TMC_RAM_SVOP_PDP to 2. */
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/* NOTE: Nintendo acidentally writes this to the PMC instead of the APB due to a bug. */
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reg::ReadWrite(APB + APB_MISC_GP_ASDBGREG, APB_MISC_REG_BITS_VALUE(GP_ASDBGREG_CFG2TMC_RAM_SVOP_PDP, 2));
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/* Set CLK_SYSTEM_RATE. */
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reg::Write(CLKRST + CLK_RST_CONTROLLER_CLK_SYSTEM_RATE, CLK_RST_REG_BITS_VALUE(CLK_SYSTEM_RATE_HCLK_DIS, 0),
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