mirrors/Atmosphere
1
0
Fork 0
mirror of https://github.com/Atmosphere-NX/Atmosphere.git synced 2024-12-19 17:02:14 +00:00
Code Issues Releases Activity

kern: rename CacheHelper operation for accuracy

Browse source
This commit is contained in:
Michael Scire 2020-08-03 18:52:51 -07:00 committed by SciresM
parent 595c6dbe8f
commit 3ec9a9e59f
2 changed files with 8 additions and 8 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

14
libraries/libmesosphere/source/arch/arm64/kern_cpu.cpp
View file

@ -88,7 +88,7 @@ namespace ams::kern::arch::arm64::cpu {
public:
enum class Operation {
Idle,
InvalidateInstructionCache,
InstructionMemoryBarrier,
StoreDataCache,
FlushDataCache,
};
@ -160,7 +160,7 @@ namespace ams::kern::arch::arm64::cpu {
constexpr u64 AllCoresMask = (1ul << cpu::NumCores) - 1ul;
const u64 other_cores_mask = AllCoresMask & ~(1ul << GetCurrentCoreId());
if ((op == Operation::InvalidateInstructionCache) || (Kernel::GetState() == Kernel::State::Initializing)) {
if ((op == Operation::InstructionMemoryBarrier) || (Kernel::GetState() == Kernel::State::Initializing)) {
/* Check that there's no on-going operation. */
MESOSPHERE_ABORT_UNLESS(this->operation == Operation::Idle);
MESOSPHERE_ABORT_UNLESS(this->target_cores == 0);
@ -286,7 +286,7 @@ namespace ams::kern::arch::arm64::cpu {
switch (this->operation) {
case Operation::Idle:
break;
case Operation::InvalidateInstructionCache:
case Operation::InstructionMemoryBarrier:
InstructionMemoryBarrier();
break;
case Operation::StoreDataCache:
@ -423,8 +423,8 @@ namespace ams::kern::arch::arm64::cpu {
R_TRY(InvalidateInstructionCacheRange(start, end));
/* Request the interrupt helper to invalidate, too. */
g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InvalidateInstructionCache);
/* Request the interrupt helper to perform an instruction memory barrier. */
g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InstructionMemoryBarrier);
return ResultSuccess();
}
@ -436,8 +436,8 @@ namespace ams::kern::arch::arm64::cpu {
InvalidateEntireInstructionCacheGlobalImpl();
EnsureInstructionConsistency();
/* Request the interrupt helper to invalidate, too. */
g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InvalidateInstructionCache);
/* Request the interrupt helper to perform an instruction memory barrier. */
g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InstructionMemoryBarrier);
}
void InitializeInterruptThreads(s32 core_id) {

2
libraries/libmesosphere/source/kern_k_page_table_base.cpp
View file

@ -2167,7 +2167,7 @@ namespace ams::kern {
/* Copy remaining data. */
if (cur_size > 0) {
R_UNLESS(UserspaceAccess::CopyMemoryFromUser(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), buffer, cur_size), svc::ResultInvalidCurrentMemory());
cpu::StoreDataCache(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), copy_size);
cpu::StoreDataCache(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), cur_size);
}
return ResultSuccess();