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kern: rename CacheHelper operation for accuracy

This commit is contained in:
Michael Scire 2020-08-03 18:52:51 -07:00 committed by SciresM
parent 595c6dbe8f
commit 3ec9a9e59f
2 changed files with 8 additions and 8 deletions

View file

@ -88,7 +88,7 @@ namespace ams::kern::arch::arm64::cpu {
public: public:
enum class Operation { enum class Operation {
Idle, Idle,
InvalidateInstructionCache, InstructionMemoryBarrier,
StoreDataCache, StoreDataCache,
FlushDataCache, FlushDataCache,
}; };
@ -160,7 +160,7 @@ namespace ams::kern::arch::arm64::cpu {
constexpr u64 AllCoresMask = (1ul << cpu::NumCores) - 1ul; constexpr u64 AllCoresMask = (1ul << cpu::NumCores) - 1ul;
const u64 other_cores_mask = AllCoresMask & ~(1ul << GetCurrentCoreId()); const u64 other_cores_mask = AllCoresMask & ~(1ul << GetCurrentCoreId());
if ((op == Operation::InvalidateInstructionCache) || (Kernel::GetState() == Kernel::State::Initializing)) { if ((op == Operation::InstructionMemoryBarrier) || (Kernel::GetState() == Kernel::State::Initializing)) {
/* Check that there's no on-going operation. */ /* Check that there's no on-going operation. */
MESOSPHERE_ABORT_UNLESS(this->operation == Operation::Idle); MESOSPHERE_ABORT_UNLESS(this->operation == Operation::Idle);
MESOSPHERE_ABORT_UNLESS(this->target_cores == 0); MESOSPHERE_ABORT_UNLESS(this->target_cores == 0);
@ -286,7 +286,7 @@ namespace ams::kern::arch::arm64::cpu {
switch (this->operation) { switch (this->operation) {
case Operation::Idle: case Operation::Idle:
break; break;
case Operation::InvalidateInstructionCache: case Operation::InstructionMemoryBarrier:
InstructionMemoryBarrier(); InstructionMemoryBarrier();
break; break;
case Operation::StoreDataCache: case Operation::StoreDataCache:
@ -423,8 +423,8 @@ namespace ams::kern::arch::arm64::cpu {
R_TRY(InvalidateInstructionCacheRange(start, end)); R_TRY(InvalidateInstructionCacheRange(start, end));
/* Request the interrupt helper to invalidate, too. */ /* Request the interrupt helper to perform an instruction memory barrier. */
g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InvalidateInstructionCache); g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InstructionMemoryBarrier);
return ResultSuccess(); return ResultSuccess();
} }
@ -436,8 +436,8 @@ namespace ams::kern::arch::arm64::cpu {
InvalidateEntireInstructionCacheGlobalImpl(); InvalidateEntireInstructionCacheGlobalImpl();
EnsureInstructionConsistency(); EnsureInstructionConsistency();
/* Request the interrupt helper to invalidate, too. */ /* Request the interrupt helper to perform an instruction memory barrier. */
g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InvalidateInstructionCache); g_cache_operation_handler.RequestOperation(KCacheHelperInterruptHandler::Operation::InstructionMemoryBarrier);
} }
void InitializeInterruptThreads(s32 core_id) { void InitializeInterruptThreads(s32 core_id) {

View file

@ -2167,7 +2167,7 @@ namespace ams::kern {
/* Copy remaining data. */ /* Copy remaining data. */
if (cur_size > 0) { if (cur_size > 0) {
R_UNLESS(UserspaceAccess::CopyMemoryFromUser(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), buffer, cur_size), svc::ResultInvalidCurrentMemory()); R_UNLESS(UserspaceAccess::CopyMemoryFromUser(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), buffer, cur_size), svc::ResultInvalidCurrentMemory());
cpu::StoreDataCache(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), copy_size); cpu::StoreDataCache(GetVoidPointer(GetLinearMappedVirtualAddress(cur_addr)), cur_size);
} }
return ResultSuccess(); return ResultSuccess();