fusee: accurately match Mariko pk1ldr

fusee/fusee-mtc/src/car.h

@@ -37,23 +37,27 @@
 
 /* Clock and reset devices. */
 typedef enum {
+    CARDEVICE_BPMP      = ((0 << 5) | 0x1),
     CARDEVICE_UARTA     = ((0 << 5) | 0x6),
     CARDEVICE_UARTB     = ((0 << 5) | 0x7),
-    CARDEVICE_UARTC = ((1 << 5) | 0x17),
     CARDEVICE_I2C1      = ((0 << 5) | 0xC),
+    CARDEVICE_USBD      = ((0 << 5) | 0x16),
+    CARDEVICE_HOST1X    = ((0 << 5) | 0x1C),
+    CARDEVICE_AHBDMA    = ((1 << 5) | 0x1),
+    CARDEVICE_APBDMA    = ((1 << 5) | 0x2),
+    CARDEVICE_KFUSE     = ((1 << 5) | 0x8),
     CARDEVICE_I2C5      = ((1 << 5) | 0xF),
+    CARDEVICE_UARTC     = ((1 << 5) | 0x17),
+    CARDEVICE_USB2      = ((1 << 5) | 0x1A),
+    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
+    CARDEVICE_TSEC      = ((2 << 5) | 0x13),
+    CARDEVICE_ACTMON    = ((3 << 5) | 0x17),
     CARDEVICE_TZRAM     = ((3 << 5) | 0x1E),
     CARDEVICE_SE        = ((3 << 5) | 0x1F),
-    CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
+    CARDEVICE_CL_DVFS   = ((4 << 5) | 0x1B),
-    CARDEVICE_TSEC = ((2 << 5) | 0x13),
-    CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
     CARDEVICE_SOR0      = ((5 << 5) | 0x16),
     CARDEVICE_SOR1      = ((5 << 5) | 0x17),
-    CARDEVICE_KFUSE = ((1 << 5) | 0x8),
+    CARDEVICE_SOR_SAFE  = ((6 << 5) | 0x1E),
-    CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
-    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
-    CARDEVICE_ACTMON = ((3 << 5) | 0x17),
-    CARDEVICE_BPMP = ((0 << 5) | 0x1)
 } CarDevice;
 
 /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
@@ -283,7 +287,7 @@ typedef struct {
     uint32_t clk_source_sata_oob;       /* _CLK_SOURCE_SATA_OOB_0,      0x420 */
     uint32_t clk_source_sata;           /* _CLK_SOURCE_SATA_0,          0x424 */
     uint32_t clk_source_hda;            /* _CLK_SOURCE_HDA_0,           0x428 */
-    uint32_t _0x42c;
+    uint32_t clk_source_se;             /* _CLK_SOURCE_SE_0,            0x42c */
 
     /* _RST_DEV_V/W_SET_0 0x430-0x43c */
     uint32_t rst_dev_v_set;

fusee/fusee-primary/fusee-primary-main/src/car.h

@@ -37,23 +37,27 @@
 
 /* Clock and reset devices. */
 typedef enum {
+    CARDEVICE_BPMP      = ((0 << 5) | 0x1),
     CARDEVICE_UARTA     = ((0 << 5) | 0x6),
     CARDEVICE_UARTB     = ((0 << 5) | 0x7),
-    CARDEVICE_UARTC = ((1 << 5) | 0x17),
     CARDEVICE_I2C1      = ((0 << 5) | 0xC),
+    CARDEVICE_USBD      = ((0 << 5) | 0x16),
+    CARDEVICE_HOST1X    = ((0 << 5) | 0x1C),
+    CARDEVICE_AHBDMA    = ((1 << 5) | 0x1),
+    CARDEVICE_APBDMA    = ((1 << 5) | 0x2),
+    CARDEVICE_KFUSE     = ((1 << 5) | 0x8),
     CARDEVICE_I2C5      = ((1 << 5) | 0xF),
+    CARDEVICE_UARTC     = ((1 << 5) | 0x17),
+    CARDEVICE_USB2      = ((1 << 5) | 0x1A),
+    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
+    CARDEVICE_TSEC      = ((2 << 5) | 0x13),
+    CARDEVICE_ACTMON    = ((3 << 5) | 0x17),
     CARDEVICE_TZRAM     = ((3 << 5) | 0x1E),
     CARDEVICE_SE        = ((3 << 5) | 0x1F),
-    CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
+    CARDEVICE_CL_DVFS   = ((4 << 5) | 0x1B),
-    CARDEVICE_TSEC = ((2 << 5) | 0x13),
-    CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
     CARDEVICE_SOR0      = ((5 << 5) | 0x16),
     CARDEVICE_SOR1      = ((5 << 5) | 0x17),
-    CARDEVICE_KFUSE = ((1 << 5) | 0x8),
+    CARDEVICE_SOR_SAFE  = ((6 << 5) | 0x1E),
-    CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
-    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
-    CARDEVICE_ACTMON = ((3 << 5) | 0x17),
-    CARDEVICE_BPMP = ((0 << 5) | 0x1)
 } CarDevice;
 
 /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
@@ -283,7 +287,7 @@ typedef struct {
     uint32_t clk_source_sata_oob;       /* _CLK_SOURCE_SATA_OOB_0,      0x420 */
     uint32_t clk_source_sata;           /* _CLK_SOURCE_SATA_0,          0x424 */
     uint32_t clk_source_hda;            /* _CLK_SOURCE_HDA_0,           0x428 */
-    uint32_t _0x42c;
+    uint32_t clk_source_se;             /* _CLK_SOURCE_SE_0,            0x42c */
 
     /* _RST_DEV_V/W_SET_0 0x430-0x43c */
     uint32_t rst_dev_v_set;

fusee/fusee-primary/fusee-primary-main/src/hwinit.c

@@ -335,14 +335,12 @@ static void nx_hwinit_mariko(bool enable_log) {
     volatile tegra_pmc_t *pmc = pmc_get_regs();
     volatile tegra_car_t *car = car_get_regs();
     
-    /* Enable SE clock. */
+    /* Enable SE clock and lock it. */
     clkrst_reboot(CARDEVICE_SE);
+    car->clk_source_se |= 0x100;
 
-    /* Initialize the fuse driver. */
+    /* Make all fuse registers visible. */
-    fuse_init();
+    clkrst_enable_fuse_regs(true);
-
-    /* Initialize the memory controller. */
-    mc_enable();
     
     /* Configure oscillators. */
     config_oscillators();

fusee/fusee-secondary/src/car.h

@@ -287,7 +287,7 @@ typedef struct {
     uint32_t clk_source_sata_oob;       /* _CLK_SOURCE_SATA_OOB_0,      0x420 */
     uint32_t clk_source_sata;           /* _CLK_SOURCE_SATA_0,          0x424 */
     uint32_t clk_source_hda;            /* _CLK_SOURCE_HDA_0,           0x428 */
-    uint32_t _0x42c;
+    uint32_t clk_source_se;             /* _CLK_SOURCE_SE_0,            0x42c */
 
     /* _RST_DEV_V/W_SET_0 0x430-0x43c */
     uint32_t rst_dev_v_set;

sept/sept-primary/src/car.h

@@ -37,23 +37,27 @@
 
 /* Clock and reset devices. */
 typedef enum {
+    CARDEVICE_BPMP      = ((0 << 5) | 0x1),
     CARDEVICE_UARTA     = ((0 << 5) | 0x6),
     CARDEVICE_UARTB     = ((0 << 5) | 0x7),
-    CARDEVICE_UARTC = ((1 << 5) | 0x17),
     CARDEVICE_I2C1      = ((0 << 5) | 0xC),
+    CARDEVICE_USBD      = ((0 << 5) | 0x16),
+    CARDEVICE_HOST1X    = ((0 << 5) | 0x1C),
+    CARDEVICE_AHBDMA    = ((1 << 5) | 0x1),
+    CARDEVICE_APBDMA    = ((1 << 5) | 0x2),
+    CARDEVICE_KFUSE     = ((1 << 5) | 0x8),
     CARDEVICE_I2C5      = ((1 << 5) | 0xF),
+    CARDEVICE_UARTC     = ((1 << 5) | 0x17),
+    CARDEVICE_USB2      = ((1 << 5) | 0x1A),
+    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
+    CARDEVICE_TSEC      = ((2 << 5) | 0x13),
+    CARDEVICE_ACTMON    = ((3 << 5) | 0x17),
     CARDEVICE_TZRAM     = ((3 << 5) | 0x1E),
     CARDEVICE_SE        = ((3 << 5) | 0x1F),
-    CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
+    CARDEVICE_CL_DVFS   = ((4 << 5) | 0x1B),
-    CARDEVICE_TSEC = ((2 << 5) | 0x13),
-    CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
     CARDEVICE_SOR0      = ((5 << 5) | 0x16),
     CARDEVICE_SOR1      = ((5 << 5) | 0x17),
-    CARDEVICE_KFUSE = ((1 << 5) | 0x8),
+    CARDEVICE_SOR_SAFE  = ((6 << 5) | 0x1E),
-    CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
-    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
-    CARDEVICE_ACTMON = ((3 << 5) | 0x17),
-    CARDEVICE_BPMP = ((0 << 5) | 0x1)
 } CarDevice;
 
 /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
@@ -283,7 +287,7 @@ typedef struct {
     uint32_t clk_source_sata_oob;       /* _CLK_SOURCE_SATA_OOB_0,      0x420 */
     uint32_t clk_source_sata;           /* _CLK_SOURCE_SATA_0,          0x424 */
     uint32_t clk_source_hda;            /* _CLK_SOURCE_HDA_0,           0x428 */
-    uint32_t _0x42c;
+    uint32_t clk_source_se;             /* _CLK_SOURCE_SE_0,            0x42c */
 
     /* _RST_DEV_V/W_SET_0 0x430-0x43c */
     uint32_t rst_dev_v_set;

sept/sept-secondary/src/car.h

@@ -37,23 +37,27 @@
 
 /* Clock and reset devices. */
 typedef enum {
+    CARDEVICE_BPMP      = ((0 << 5) | 0x1),
     CARDEVICE_UARTA     = ((0 << 5) | 0x6),
     CARDEVICE_UARTB     = ((0 << 5) | 0x7),
-    CARDEVICE_UARTC = ((1 << 5) | 0x17),
     CARDEVICE_I2C1      = ((0 << 5) | 0xC),
+    CARDEVICE_USBD      = ((0 << 5) | 0x16),
+    CARDEVICE_HOST1X    = ((0 << 5) | 0x1C),
+    CARDEVICE_AHBDMA    = ((1 << 5) | 0x1),
+    CARDEVICE_APBDMA    = ((1 << 5) | 0x2),
+    CARDEVICE_KFUSE     = ((1 << 5) | 0x8),
     CARDEVICE_I2C5      = ((1 << 5) | 0xF),
+    CARDEVICE_UARTC     = ((1 << 5) | 0x17),
+    CARDEVICE_USB2      = ((1 << 5) | 0x1A),
+    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
+    CARDEVICE_TSEC      = ((2 << 5) | 0x13),
+    CARDEVICE_ACTMON    = ((3 << 5) | 0x17),
     CARDEVICE_TZRAM     = ((3 << 5) | 0x1E),
     CARDEVICE_SE        = ((3 << 5) | 0x1F),
-    CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
+    CARDEVICE_CL_DVFS   = ((4 << 5) | 0x1B),
-    CARDEVICE_TSEC = ((2 << 5) | 0x13),
-    CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
     CARDEVICE_SOR0      = ((5 << 5) | 0x16),
     CARDEVICE_SOR1      = ((5 << 5) | 0x17),
-    CARDEVICE_KFUSE = ((1 << 5) | 0x8),
+    CARDEVICE_SOR_SAFE  = ((6 << 5) | 0x1E),
-    CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
-    CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
-    CARDEVICE_ACTMON = ((3 << 5) | 0x17),
-    CARDEVICE_BPMP = ((0 << 5) | 0x1)
 } CarDevice;
 
 /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
@@ -283,7 +287,7 @@ typedef struct {
     uint32_t clk_source_sata_oob;       /* _CLK_SOURCE_SATA_OOB_0,      0x420 */
     uint32_t clk_source_sata;           /* _CLK_SOURCE_SATA_0,          0x424 */
     uint32_t clk_source_hda;            /* _CLK_SOURCE_HDA_0,           0x428 */
-    uint32_t _0x42c;
+    uint32_t clk_source_se;             /* _CLK_SOURCE_SE_0,            0x42c */
 
     /* _RST_DEV_V/W_SET_0 0x430-0x43c */
     uint32_t rst_dev_v_set;

sept/sept-secondary/src/hwinit.c

@@ -335,14 +335,12 @@ static void nx_hwinit_mariko(bool enable_log) {
     volatile tegra_pmc_t *pmc = pmc_get_regs();
     volatile tegra_car_t *car = car_get_regs();
     
-    /* Enable SE clock. */
+    /* Enable SE clock and lock it. */
     clkrst_reboot(CARDEVICE_SE);
+    car->clk_source_se |= 0x100;
 
-    /* Initialize the fuse driver. */
+    /* Make all fuse registers visible. */
-    fuse_init();
+    clkrst_enable_fuse_regs(true);
-
-    /* Initialize the memory controller. */
-    mc_enable();
     
     /* Configure oscillators. */
     config_oscillators();