From 4f9ecc9d508e0197e555a839937fefe759138573 Mon Sep 17 00:00:00 2001 From: Michael Scire Date: Mon, 17 Dec 2018 17:32:44 -0800 Subject: [PATCH] warmboot: finish cluster_initialize_cpu --- exosphere/lp0fw/src/car.h | 5 +++++ exosphere/lp0fw/src/cluster.c | 19 +++++++++++++++++-- 2 files changed, 22 insertions(+), 2 deletions(-) diff --git a/exosphere/lp0fw/src/car.h b/exosphere/lp0fw/src/car.h index 5cc0b5d90..c762f434f 100644 --- a/exosphere/lp0fw/src/car.h +++ b/exosphere/lp0fw/src/car.h @@ -47,6 +47,9 @@ #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD_0 MAKE_CAR_REG(0x3A4) #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE_0 MAKE_CAR_REG(0x554) +#define CLK_RST_CONTROLLER_CCLKG_BURST_POLICY_0 MAKE_CAR_REG(0x368) +#define CLK_RST_CONTROLLER_CCLKP_BURST_POLICY_0 MAKE_CAR_REG(0x370) + #define CLK_RST_CONTROLLER_RST_DEVICES_H_0 MAKE_CAR_REG(0x008) #define CLK_RST_CONTROLLER_SPARE_REG0_0 MAKE_CAR_REG(0x55C) @@ -58,10 +61,12 @@ #define CLK_RST_CONTROLLER_RST_DEV_U_CLR_0 MAKE_CAR_REG(0x314) #define CLK_RST_CONTROLLER_RST_DEV_V_CLR_0 MAKE_CAR_REG(0x434) +#define CLK_RST_CONTROLLER_CLK_ENB_L_SET_0 MAKE_CAR_REG(0x320) #define CLK_RST_CONTROLLER_CLK_ENB_H_SET_0 MAKE_CAR_REG(0x328) #define CLK_RST_CONTROLLER_CLK_ENB_U_SET_0 MAKE_CAR_REG(0x330) #define CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 MAKE_CAR_REG(0x440) #define CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 MAKE_CAR_REG(0x448) +#define CLK_RST_CONTROLLER_CLK_ENB_Y_SET_0 MAKE_CAR_REG(0x29C) #define CLK_RST_CONTROLLER_CLK_ENB_H_CLR_0 MAKE_CAR_REG(0x32C) #define CLK_RST_CONTROLLER_CLK_ENB_W_CLR_0 MAKE_CAR_REG(0x44C) diff --git a/exosphere/lp0fw/src/cluster.c b/exosphere/lp0fw/src/cluster.c index a3040216b..d05de9082 100644 --- a/exosphere/lp0fw/src/cluster.c +++ b/exosphere/lp0fw/src/cluster.c @@ -133,10 +133,25 @@ void cluster_initialize_cpu(void) { /* Perform RAM repair if necessary. */ flow_perform_ram_repair(); - /* Enable power to the C0NC partition. */ + /* Enable power to the non-CPU partition. */ cluster_pmc_enable_partition(0x8000, 0x10F); - /* TODO: other shit */ + /* Enable clock to PLLP_OUT_CPU, wait 2 us. */ + CLK_RST_CONTROLLER_CLK_ENB_Y_SET_0 = 0x80000000; + timer_wait(2); + + /* Enable clock to CPU, CPUG, wait 10 us. */ + CLK_RST_CONTROLLER_CLK_ENB_L_SET_0 = 1; + CLK_RST_CONTROLLER_CLK_ENB_V_SET_0 = 1; + timer_wait(10); + + /* Set CPU clock sources to PLLP_OUT_0 + state to RUN, wait 10 us. */ + CLK_RST_CONTROLLER_CCLKG_BURST_POLICY_0 = 0x20004444; + CLK_RST_CONTROLLER_CCLKP_BURST_POLICY_0 = 0x20004444; + timer_wait(10); + + /* Take non-CPU out of reset (write CLR_NONCPURESET). */ + CLK_RST_CONTROLLER_RST_CPUG_CMPLX_CLR_0 = 0x20000000; } void cluster_power_on_cpu(void) {