mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-12-23 02:42:09 +00:00
fusee: fix sdmmc speed modes
This commit is contained in:
parent
d233b482fb
commit
5e342d8c52
5 changed files with 80 additions and 80 deletions
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@ -734,11 +734,11 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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return 0;
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/* Reconfigure the internal clock. */
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_UHS_SDR104))
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR104))
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return 0;
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/* Run tuning. */
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if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_UHS_SDR104, MMC_SEND_TUNING_BLOCK))
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if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_SD_SDR104, MMC_SEND_TUNING_BLOCK))
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return 0;
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}
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else if (status[13] & SD_MODE_UHS_SDR50) /* High-speed SDR50 is supported. */
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@ -748,11 +748,11 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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return 0;
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/* Reconfigure the internal clock. */
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_UHS_SDR50))
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR50))
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return 0;
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/* Run tuning. */
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if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_UHS_SDR50, MMC_SEND_TUNING_BLOCK))
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if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_SD_SDR50, MMC_SEND_TUNING_BLOCK))
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return 0;
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}
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else if (status[13] & SD_MODE_UHS_SDR12) /* High-speed SDR12 is supported. */
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@ -762,11 +762,11 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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return 0;
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/* Reconfigure the internal clock. */
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_UHS_SDR12))
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR12))
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return 0;
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/* Run tuning. */
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if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_UHS_SDR12, MMC_SEND_TUNING_BLOCK))
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if (!sdmmc_execute_tuning(device->sdmmc, SDMMC_SPEED_SD_SDR12, MMC_SEND_TUNING_BLOCK))
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return 0;
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}
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else
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@ -791,7 +791,7 @@ static int sdmmc_sd_switch_hs_high(sdmmc_device_t *device, uint8_t *status)
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return 0;
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/* Reconfigure the internal clock. */
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_UHS_SDR25))
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_SDR25))
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return 0;
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/* Peek the SD card's status. */
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@ -848,7 +848,7 @@ int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth b
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memset(device, 0, sizeof(sdmmc_device_t));
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/* Try to initialize the driver. */
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if (!sdmmc_init(sdmmc, SDMMC_1, SDMMC_VOLTAGE_3V3, SDMMC_BUS_WIDTH_1BIT, SDMMC_SPEED_SD_INIT))
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if (!sdmmc_init(sdmmc, SDMMC_1, SDMMC_VOLTAGE_3V3, SDMMC_BUS_WIDTH_1BIT, SDMMC_SPEED_SD_IDENT))
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{
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sdmmc_error(sdmmc, "Failed to initialize the SDMMC driver!");
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return 0;
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@ -881,7 +881,7 @@ int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth b
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sdmmc_info(sdmmc, "Sent if cond to SD card!");
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/* Get the SD card's operating conditions. */
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if (!sdmmc_sd_send_op_cond(device, is_sd_ver2, (bus_width == SDMMC_BUS_WIDTH_4BIT) && (bus_speed == SDMMC_SPEED_UHS_SDR104)))
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if (!sdmmc_sd_send_op_cond(device, is_sd_ver2, (bus_width == SDMMC_BUS_WIDTH_4BIT) && (bus_speed == SDMMC_SPEED_SD_SDR104)))
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{
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sdmmc_error(sdmmc, "Failed to send op cond!");
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return 0;
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@ -927,7 +927,7 @@ int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth b
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if (!device->is_180v)
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{
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/* Reconfigure the internal clock. */
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_LEGACY))
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if (!sdmmc_select_speed(device->sdmmc, SDMMC_SPEED_SD_DS))
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{
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sdmmc_error(sdmmc, "Failed to apply the correct bus speed!");
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return 0;
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@ -1005,7 +1005,7 @@ int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth b
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sdmmc_info(sdmmc, "Switched to high-speed from low voltage!");
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}
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else if ((device->scr.sda_vsn & (SD_SCR_SPEC_VER_1 | SD_SCR_SPEC_VER_2)) && ((bus_speed != SDMMC_SPEED_SD_LEGACY)))
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else if ((device->scr.sda_vsn & (SD_SCR_SPEC_VER_1 | SD_SCR_SPEC_VER_2)) && ((bus_speed != SDMMC_SPEED_SD_DS)))
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{
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/* Switch to high-speed from high voltage (if possible). */
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if (!sdmmc_sd_switch_hs_high(device, switch_status))
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@ -1404,7 +1404,7 @@ int sdmmc_device_mmc_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth
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memset(device, 0, sizeof(sdmmc_device_t));
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/* Try to initialize the driver. */
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if (!sdmmc_init(sdmmc, SDMMC_4, SDMMC_VOLTAGE_1V8, SDMMC_BUS_WIDTH_1BIT, SDMMC_SPEED_MMC_INIT))
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if (!sdmmc_init(sdmmc, SDMMC_4, SDMMC_VOLTAGE_1V8, SDMMC_BUS_WIDTH_1BIT, SDMMC_SPEED_MMC_IDENT))
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{
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sdmmc_error(sdmmc, "Failed to initialize the SDMMC driver!");
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return 0;
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@ -307,28 +307,28 @@ static int sdmmc_get_sdclk_freq(SdmmcBusSpeed bus_speed)
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{
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switch (bus_speed)
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{
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case SDMMC_SPEED_MMC_INIT:
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case SDMMC_SPEED_MMC_IDENT:
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case SDMMC_SPEED_MMC_LEGACY:
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return 26000;
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case SDMMC_SPEED_MMC_HS:
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return 52000;
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case SDMMC_SPEED_MMC_HS200:
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case SDMMC_SPEED_MMC_HS400:
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case SDMMC_SPEED_UHS_SDR104:
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case SDMMC_SPEED_SD_SDR104:
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case SDMMC_SPEED_EMU_SDR104:
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return 200000;
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case SDMMC_SPEED_SD_INIT:
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case SDMMC_SPEED_SD_LEGACY:
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case SDMMC_SPEED_UHS_SDR12:
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case SDMMC_SPEED_SD_IDENT:
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case SDMMC_SPEED_SD_DS:
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case SDMMC_SPEED_SD_SDR12:
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return 25000;
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case SDMMC_SPEED_SD_HS:
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case SDMMC_SPEED_UHS_SDR25:
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case SDMMC_SPEED_SD_SDR25:
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return 50000;
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case SDMMC_SPEED_UHS_SDR50:
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case SDMMC_SPEED_SD_SDR50:
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return 100000;
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case SDMMC_SPEED_UHS_DDR50:
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case SDMMC_SPEED_GC_ASIC_FPGA:
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return 40800;
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case SDMMC_SPEED_MMC_DDR52:
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case SDMMC_SPEED_GC_ASIC:
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return 200000;
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default:
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return 0;
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@ -340,23 +340,23 @@ static int sdmmc_get_sdclk_div(SdmmcBusSpeed bus_speed)
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{
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switch (bus_speed)
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{
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case SDMMC_SPEED_MMC_INIT:
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case SDMMC_SPEED_MMC_IDENT:
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return 66;
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case SDMMC_SPEED_SD_INIT:
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case SDMMC_SPEED_SD_IDENT:
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case SDMMC_SPEED_MMC_LEGACY:
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case SDMMC_SPEED_MMC_HS:
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case SDMMC_SPEED_MMC_HS200:
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case SDMMC_SPEED_MMC_HS400:
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case SDMMC_SPEED_SD_LEGACY:
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case SDMMC_SPEED_SD_DS:
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case SDMMC_SPEED_SD_HS:
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case SDMMC_SPEED_UHS_SDR12:
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case SDMMC_SPEED_UHS_SDR25:
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case SDMMC_SPEED_UHS_SDR50:
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case SDMMC_SPEED_UHS_SDR104:
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case SDMMC_SPEED_UHS_DDR50:
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case SDMMC_SPEED_SD_SDR12:
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case SDMMC_SPEED_SD_SDR25:
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case SDMMC_SPEED_SD_SDR50:
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case SDMMC_SPEED_SD_SDR104:
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case SDMMC_SPEED_GC_ASIC_FPGA:
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case SDMMC_SPEED_EMU_SDR104:
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return 1;
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case SDMMC_SPEED_MMC_DDR52:
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case SDMMC_SPEED_GC_ASIC:
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return 2;
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default:
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return 0;
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@ -375,7 +375,7 @@ static int sdmmc_clk_set_source(SdmmcControllerNum controller, uint32_t clk_freq
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{
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case 25000:
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out_freq = 24728;
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car_div = SDMMC_CAR_DIVIDER_UHS_SDR12;
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car_div = SDMMC_CAR_DIVIDER_SD_SDR12;
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break;
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case 26000:
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out_freq = 25500;
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@ -383,11 +383,11 @@ static int sdmmc_clk_set_source(SdmmcControllerNum controller, uint32_t clk_freq
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break;
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case 40800:
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out_freq = 40800;
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car_div = SDMMC_CAR_DIVIDER_UHS_DDR50;
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car_div = SDMMC_CAR_DIVIDER_GC_ASIC_FPGA;
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break;
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case 50000:
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out_freq = 48000;
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car_div = SDMMC_CAR_DIVIDER_UHS_SDR25;
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car_div = SDMMC_CAR_DIVIDER_SD_SDR25;
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break;
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case 52000:
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out_freq = 51000;
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@ -395,7 +395,7 @@ static int sdmmc_clk_set_source(SdmmcControllerNum controller, uint32_t clk_freq
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break;
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case 100000:
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out_freq = 90667;
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car_div = SDMMC_CAR_DIVIDER_UHS_SDR50;
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car_div = SDMMC_CAR_DIVIDER_SD_SDR50;
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break;
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case 200000:
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out_freq = 163200;
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@ -403,7 +403,7 @@ static int sdmmc_clk_set_source(SdmmcControllerNum controller, uint32_t clk_freq
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break;
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case 208000:
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out_freq = 204000;
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car_div = SDMMC_CAR_DIVIDER_UHS_SDR104;
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car_div = SDMMC_CAR_DIVIDER_SD_SDR104;
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break;
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default:
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return 0;
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@ -884,10 +884,10 @@ int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed)
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/* Set the appropriate host speed. */
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switch (bus_speed) {
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/* 400kHz initialization mode and a few others. */
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case SDMMC_SPEED_MMC_INIT:
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case SDMMC_SPEED_MMC_IDENT:
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case SDMMC_SPEED_MMC_LEGACY:
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case SDMMC_SPEED_SD_INIT:
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case SDMMC_SPEED_SD_LEGACY:
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case SDMMC_SPEED_SD_IDENT:
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case SDMMC_SPEED_SD_DS:
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sdmmc->regs->host_control &= ~(SDHCI_CTRL_HISPD);
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_VDD_180);
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break;
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@ -895,17 +895,17 @@ int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed)
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/* 50MHz high speed (SD) and 52MHz high speed (MMC). */
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case SDMMC_SPEED_SD_HS:
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case SDMMC_SPEED_MMC_HS:
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case SDMMC_SPEED_UHS_SDR25:
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case SDMMC_SPEED_SD_SDR25:
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sdmmc->regs->host_control |= SDHCI_CTRL_HISPD;
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_VDD_180);
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break;
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/* 200MHz UHS-I (SD) and other modes due to errata. */
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case SDMMC_SPEED_MMC_HS200:
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case SDMMC_SPEED_UHS_SDR104:
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case SDMMC_SPEED_UHS_DDR50:
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case SDMMC_SPEED_UHS_SDR50:
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case SDMMC_SPEED_MMC_DDR52:
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case SDMMC_SPEED_SD_SDR104:
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case SDMMC_SPEED_GC_ASIC_FPGA:
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case SDMMC_SPEED_SD_SDR50:
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case SDMMC_SPEED_GC_ASIC:
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case SDMMC_SPEED_EMU_SDR104:
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
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sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR104;
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@ -920,7 +920,7 @@ int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed)
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break;
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/* 25MHz default speed (SD). */
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case SDMMC_SPEED_UHS_SDR12:
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case SDMMC_SPEED_SD_SDR12:
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
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sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR12;
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sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
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@ -1754,7 +1754,7 @@ int sdmmc_switch_voltage(sdmmc_t *sdmmc)
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sdmmc_disable_sd_clock(sdmmc);
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/* Reconfigure the internal clock. */
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if (!sdmmc_select_speed(sdmmc, SDMMC_SPEED_UHS_SDR12))
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if (!sdmmc_select_speed(sdmmc, SDMMC_SPEED_SD_SDR12))
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{
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sdmmc_error(sdmmc, "Failed to apply the correct bus speed for low voltage support!");
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return 0;
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@ -1919,14 +1919,14 @@ int sdmmc_execute_tuning(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed, uint32_t opcod
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{
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case SDMMC_SPEED_MMC_HS200:
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case SDMMC_SPEED_MMC_HS400:
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case SDMMC_SPEED_UHS_SDR104:
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case SDMMC_SPEED_SD_SDR104:
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case SDMMC_SPEED_EMU_SDR104:
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max_tuning_loop = 0x80;
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tuning_cntrl_flag = 0x4000;
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break;
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case SDMMC_SPEED_UHS_SDR50:
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case SDMMC_SPEED_UHS_DDR50:
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case SDMMC_SPEED_MMC_DDR52:
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case SDMMC_SPEED_SD_SDR50:
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case SDMMC_SPEED_GC_ASIC_FPGA:
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case SDMMC_SPEED_GC_ASIC:
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max_tuning_loop = 0x100;
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tuning_cntrl_flag = 0x8000;
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break;
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@ -190,53 +190,53 @@ typedef enum {
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} SdmmcControllerNum;
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typedef enum {
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SDMMC_PARTITION_INVALID = -1,
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SDMMC_PARTITION_USER = 0,
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SDMMC_PARTITION_BOOT0 = 1,
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SDMMC_PARTITION_BOOT1 = 2,
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SDMMC_PARTITION_RPMB = 3
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SDMMC_PARTITION_INVALID = -1,
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SDMMC_PARTITION_USER = 0,
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SDMMC_PARTITION_BOOT0 = 1,
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SDMMC_PARTITION_BOOT1 = 2,
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SDMMC_PARTITION_RPMB = 3
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} SdmmcPartitionNum;
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typedef enum {
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SDMMC_VOLTAGE_NONE = 0,
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SDMMC_VOLTAGE_1V8 = 1,
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SDMMC_VOLTAGE_3V3 = 2
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SDMMC_VOLTAGE_NONE = 0,
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SDMMC_VOLTAGE_1V8 = 1,
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SDMMC_VOLTAGE_3V3 = 2
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} SdmmcBusVoltage;
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typedef enum {
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SDMMC_BUS_WIDTH_1BIT = 0,
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SDMMC_BUS_WIDTH_4BIT = 1,
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SDMMC_BUS_WIDTH_8BIT = 2
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SDMMC_BUS_WIDTH_1BIT = 0,
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SDMMC_BUS_WIDTH_4BIT = 1,
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SDMMC_BUS_WIDTH_8BIT = 2
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} SdmmcBusWidth;
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typedef enum {
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SDMMC_SPEED_MMC_INIT = 0,
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SDMMC_SPEED_MMC_IDENT = 0,
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SDMMC_SPEED_MMC_LEGACY = 1,
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SDMMC_SPEED_MMC_HS = 2,
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SDMMC_SPEED_MMC_HS200 = 3,
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SDMMC_SPEED_MMC_HS400 = 4,
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SDMMC_SPEED_SD_INIT = 5,
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SDMMC_SPEED_SD_LEGACY = 6,
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SDMMC_SPEED_SD_IDENT = 5,
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SDMMC_SPEED_SD_DS = 6,
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SDMMC_SPEED_SD_HS = 7,
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SDMMC_SPEED_UHS_SDR12 = 8,
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SDMMC_SPEED_UHS_SDR25 = 9,
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SDMMC_SPEED_UHS_SDR50 = 10,
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SDMMC_SPEED_UHS_SDR104 = 11,
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SDMMC_SPEED_UHS_RESERVED = 12,
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SDMMC_SPEED_UHS_DDR50 = 13,
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SDMMC_SPEED_MMC_DDR52 = 14,
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SDMMC_SPEED_SD_SDR12 = 8,
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SDMMC_SPEED_SD_SDR25 = 9,
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SDMMC_SPEED_SD_SDR50 = 10,
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SDMMC_SPEED_SD_SDR104 = 11,
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SDMMC_SPEED_SD_DDR50 = 12,
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SDMMC_SPEED_GC_ASIC_FPGA = 13,
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SDMMC_SPEED_GC_ASIC = 14,
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SDMMC_SPEED_EMU_SDR104 = 255, /* Custom speed mode. Prevents low voltage switch in MMC emulation. */
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} SdmmcBusSpeed;
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typedef enum {
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SDMMC_CAR_DIVIDER_UHS_SDR12 = 31, /* (16.5 * 2) - 2 */
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SDMMC_CAR_DIVIDER_UHS_SDR25 = 15, /* (8.5 * 2) - 2 */
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SDMMC_CAR_DIVIDER_UHS_SDR50 = 7, /* (4.5 * 2) - 2 */
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SDMMC_CAR_DIVIDER_UHS_SDR104 = 2, /* (2 * 2) - 2 */
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SDMMC_CAR_DIVIDER_UHS_DDR50 = 18, /* (5 * 2 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_MMC_LEGACY = 30, /* (16 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_MMC_HS = 14, /* (8 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_MMC_HS200 = 3, /* (2.5 * 2) - 2 (for PLLP_OUT0, same as HS400) */
|
||||
SDMMC_CAR_DIVIDER_MMC_LEGACY = 30, /* (16 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_MMC_HS = 14, /* (8 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_MMC_HS200 = 3, /* (2.5 * 2) - 2 (for PLLP_OUT0, same as HS400) */
|
||||
SDMMC_CAR_DIVIDER_SD_SDR12 = 31, /* (16.5 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_SD_SDR25 = 15, /* (8.5 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_SD_SDR50 = 7, /* (4.5 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_SD_SDR104 = 2, /* (2 * 2) - 2 */
|
||||
SDMMC_CAR_DIVIDER_GC_ASIC_FPGA = 18, /* (5 * 2 * 2) - 2 */
|
||||
} SdmmcCarDivider;
|
||||
|
||||
/* Structure for describing a SDMMC device. */
|
||||
|
|
|
@ -41,7 +41,7 @@ bool mount_sd(void)
|
|||
|
||||
if (!g_sd_initialized) {
|
||||
/* Initialize SD. */
|
||||
if (sdmmc_device_sd_init(&g_sd_device, &g_sd_sdmmc, SDMMC_BUS_WIDTH_4BIT, SDMMC_SPEED_UHS_SDR104))
|
||||
if (sdmmc_device_sd_init(&g_sd_device, &g_sd_sdmmc, SDMMC_BUS_WIDTH_4BIT, SDMMC_SPEED_SD_SDR104))
|
||||
{
|
||||
g_sd_initialized = true;
|
||||
|
||||
|
|
|
@ -40,7 +40,7 @@ bool mount_sd(void)
|
|||
|
||||
if (!g_sd_initialized) {
|
||||
/* Initialize SD. */
|
||||
if (sdmmc_device_sd_init(&g_sd_device, &g_sd_sdmmc, SDMMC_BUS_WIDTH_4BIT, SDMMC_SPEED_UHS_SDR104))
|
||||
if (sdmmc_device_sd_init(&g_sd_device, &g_sd_sdmmc, SDMMC_BUS_WIDTH_4BIT, SDMMC_SPEED_SD_SDR104))
|
||||
{
|
||||
g_sd_initialized = true;
|
||||
|
||||
|
|
Loading…
Reference in a new issue