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smc_api: Fix compilation issues (#40)
* smc_api: Add missing includes MASTERKEY_REVISION_400_CURRENT, seal_titlekey, PMC_BASE and the randomcache functions aren't visible without them * smc_api: Add missing parameter name to smc_get_result * smc_api: Fix buffer being passed to se_get_exp_mod_output in smc_unwrap_rsa_oaep_wrapped_titlekey_get_result wrapped_titlekey doesn't exist * smc_api: Correct device physical address accesses in smc_read_write_register
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e29123cac3
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1 changed files with 7 additions and 3 deletions
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@ -3,8 +3,12 @@
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#include "utils.h"
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#include "utils.h"
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#include "configitem.h"
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#include "configitem.h"
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#include "cpu_context.h"
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#include "cpu_context.h"
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#include "masterkey.h"
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#include "mc.h"
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#include "mc.h"
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#include "mmu.h"
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#include "mmu.h"
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#include "pmc.h"
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#include "randomcache.h"
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#include "sealedkeys.h"
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#include "smc_api.h"
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#include "smc_api.h"
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#include "smc_user.h"
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#include "smc_user.h"
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#include "se.h"
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#include "se.h"
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@ -225,7 +229,7 @@ uint32_t smc_check_status(smc_args_t *args) {
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return 0;
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return 0;
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}
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}
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uint32_t smc_get_result(smc_args_t *) {
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uint32_t smc_get_result(smc_args_t *args) {
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uint32_t status;
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uint32_t status;
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unsigned char result_buf[0x400];
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unsigned char result_buf[0x400];
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upage_ref_t page_ref;
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upage_ref_t page_ref;
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@ -345,7 +349,7 @@ uint32_t smc_unwrap_rsa_oaep_wrapped_titlekey_get_result(void *buf, uint64_t siz
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return 2;
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return 2;
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}
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}
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se_get_exp_mod_output(wrapped_titlekey, 0x100);
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se_get_exp_mod_output(rsa_wrapped_titlekey, 0x100);
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if (tkey_rsa_oaep_unwrap(aes_wrapped_titlekey, 0x10, rsa_wrapped_titlekey, 0x100) != 0x10) {
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if (tkey_rsa_oaep_unwrap(aes_wrapped_titlekey, 0x10, rsa_wrapped_titlekey, 0x100) != 0x10) {
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/* Failed to extract RSA OAEP wrapped key. */
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/* Failed to extract RSA OAEP wrapped key. */
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g_is_smc_in_progress = false;
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g_is_smc_in_progress = false;
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@ -440,7 +444,7 @@ uint32_t smc_read_write_register(smc_args_t *args) {
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} else {
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} else {
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return 2;
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return 2;
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}
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}
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} else if (mkey_get_revision() >= MASTERKEY_REVISION_400_CURRENT && devices[MMIO_DEVID_MC].paddr <= address && address < devices[MMIO_DEVID_MC].paddr + devices[MMIO_DEVID_MC].size) {
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} else if (mkey_get_revision() >= MASTERKEY_REVISION_400_CURRENT && devices[MMIO_DEVID_MC].pa <= address && address < devices[MMIO_DEVID_MC].pa + devices[MMIO_DEVID_MC].size) {
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/* Memory Controller RW supported only on 4.0.0+ */
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/* Memory Controller RW supported only on 4.0.0+ */
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const uint8_t mc_whitelist[0x68] = {0x9F, 0x31, 0x30, 0x00, 0xF0, 0xFF, 0xF7, 0x01, 0xCD, 0xFE, 0xC0, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x03, 0x40, 0x73, 0x3E, 0x2F, 0x00, 0x00, 0x6E, 0x30, 0x05, 0x06, 0xB0, 0x71, 0xC8, 0x43, 0x04, 0x80, 0x1F, 0x08, 0x80, 0x03, 0x00, 0x0E, 0x00, 0x08, 0x00, 0xE0, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0xF0, 0x03, 0x03, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x00, 0x40, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0xE4, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0xFE, 0x0F, 0x01, 0x00, 0x80, 0x00, 0x00, 0x08, 0x00, 0x00};
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const uint8_t mc_whitelist[0x68] = {0x9F, 0x31, 0x30, 0x00, 0xF0, 0xFF, 0xF7, 0x01, 0xCD, 0xFE, 0xC0, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x03, 0x40, 0x73, 0x3E, 0x2F, 0x00, 0x00, 0x6E, 0x30, 0x05, 0x06, 0xB0, 0x71, 0xC8, 0x43, 0x04, 0x80, 0x1F, 0x08, 0x80, 0x03, 0x00, 0x0E, 0x00, 0x08, 0x00, 0xE0, 0x00, 0x0E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0xF0, 0x03, 0x03, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x31, 0x00, 0x40, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0xE4, 0xFF, 0xFF, 0x01, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0xFE, 0x0F, 0x01, 0x00, 0x80, 0x00, 0x00, 0x08, 0x00, 0x00};
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uint32_t offset = (uint32_t)(address - 0x70019000ULL);
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uint32_t offset = (uint32_t)(address - 0x70019000ULL);
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