diff --git a/fusee/fusee-primary/src/hwinit.c b/fusee/fusee-primary/src/hwinit.c
index ef01ec23c..d5f68d82b 100644
--- a/fusee/fusee-primary/src/hwinit.c
+++ b/fusee/fusee-primary/src/hwinit.c
@@ -234,7 +234,7 @@ void nx_hwinit()
     
     /* Reboot SE. */
     /* NOTE: [4.0.0+] This was removed. */
-    clkrst_reboot(CARDEVICE_SE);
+    /* clkrst_reboot(CARDEVICE_SE); */
     
     /* Reboot unknown device. */
     clkrst_reboot(CARDEVICE_UNK);
diff --git a/fusee/fusee-primary/src/mc.c b/fusee/fusee-primary/src/mc.c
index 4cacac363..e803d7a7c 100644
--- a/fusee/fusee-primary/src/mc.c
+++ b/fusee/fusee-primary/src/mc.c
@@ -160,7 +160,9 @@ void mc_enable()
     car->clk_enb_x_set = ((car->clk_enb_x_set & 0xFFFFBFFF) | 0x4000);
     
     /* Clear EMC and MC reset. */
-    car->rst_dev_h_set = 0x2000001; 
+    /* NOTE: [4.0.0+] This was changed to use the right register. */
+    /* car->rst_dev_h_set = 0x2000001; */
+    car->rst_dev_h_clr = 0x2000001; 
     udelay(5);
 
     mc_disable_ahb_redirect();
diff --git a/fusee/fusee-secondary/src/cluster.c b/fusee/fusee-secondary/src/cluster.c
index 89ce71988..747d53884 100644
--- a/fusee/fusee-secondary/src/cluster.c
+++ b/fusee/fusee-secondary/src/cluster.c
@@ -22,6 +22,7 @@
 #include "sysreg.h"
 #include "i2c.h"
 #include "car.h"
+#include "mc.h"
 #include "timers.h"
 #include "pmc.h"
 #include "max77620.h"
@@ -141,6 +142,10 @@ void cluster_boot_cpu0(uint32_t entry)
     SB_CSR_0 = 2;
     (void)SB_CSR_0;
 
+    /* Set CPU_STRICT_TZ_APERTURE_CHECK. */
+    /* NOTE: [4.0.0+] This was added, but it breaks Exosphère. */
+    /* MAKE_MC_REG(MC_TZ_SECURITY_CTRL) = 1; */
+    
     /* Clear MSELECT reset. */
     car->rst_dev_v &= 0xFFFFFFF7;
     
@@ -148,5 +153,7 @@ void cluster_boot_cpu0(uint32_t entry)
     car->rst_cpug_cmplx_clr = 0x20000000;
     
     /* Clear CPU{0,1,2,3} POR and CORE, CX0, L2, and DBG reset.*/
-    car->rst_cpug_cmplx_clr = 0x411F000F;
+    /* NOTE: [5.0.0+] This was changed so only CPU0 reset is cleared. */
+    /* car->rst_cpug_cmplx_clr = 0x411F000F; */
+    car->rst_cpug_cmplx_clr = 0x41010001;
 }