From b6a130547ade8487527d98c092df6e728fbad961 Mon Sep 17 00:00:00 2001
From: TuxSH <1922548+TuxSH@users.noreply.github.com>
Date: Tue, 14 Jan 2020 00:58:31 +0000
Subject: [PATCH] thermosphere: add common asm macros
---
thermosphere/src/arm.s | 85 +++++--------------
thermosphere/src/asm_macros.s | 36 ++++++++
.../src/breakpoints_watchpoints_load.s | 21 ++---
thermosphere/src/exception_vectors.s | 35 +++++---
thermosphere/src/fpu_regs_load_store.s | 21 ++---
thermosphere/src/spinlock.s | 20 ++---
thermosphere/src/start.s | 4 +-
7 files changed, 101 insertions(+), 121 deletions(-)
create mode 100644 thermosphere/src/asm_macros.s
diff --git a/thermosphere/src/arm.s b/thermosphere/src/arm.s
index eacb9a82c..60a750279 100644
--- a/thermosphere/src/arm.s
+++ b/thermosphere/src/arm.s
@@ -13,7 +13,9 @@
* You should have received a copy of the GNU General Public License
* along with this program. If not, see .
*/
-
+
+#include "asm_macros.s"
+
/* The following functions are taken/adapted from https://github.com/u-boot/u-boot/blob/master/arch/arm/cpu/armv8/cache.S */
/*
@@ -117,27 +119,15 @@ skip:
finished:
ret
-.section .text.flush_dcache_all, "ax", %progbits
-.global flush_dcache_all
-.type flush_dcache_all, %function
-.func flush_dcache_all
-.cfi_startproc
-flush_dcache_all:
+FUNCTION flush_dcache_all
mov x0, #0
b __asm_dcache_all
-.endfunc
-.cfi_endproc
+END_FUNCTION
-.section .text.invalidate_dcache_all, "ax", %progbits
-.global invalidate_dcache_all
-.type invalidate_dcache_all, %function
-.func invalidate_dcache_all
-.cfi_startproc
-invalidate_dcache_all:
+FUNCTION invalidate_dcache_all
mov x0, #1
b __asm_dcache_all
-.endfunc
-.cfi_endproc
+END_FUNCTION
/*
* void __asm_flush_dcache_range(start, end) (renamed -> flush_dcache_range)
@@ -147,12 +137,8 @@ invalidate_dcache_all:
* x0: start address
* x1: end address
*/
-.section .text.flush_dcache_range, "ax", %progbits
-.global flush_dcache_range
-.type flush_dcache_range, %function
-.func flush_dcache_range
-.cfi_startproc
-flush_dcache_range:
+
+FUNCTION flush_dcache_range
mrs x3, ctr_el0
lsr x3, x3, #16
and x3, x3, #0xf
@@ -168,8 +154,7 @@ flush_dcache_range:
b.lo 1b
dsb sy
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
/*
* void __asm_invalidate_dcache_range(start, end) (-> invalidate_dcache_range)
@@ -179,12 +164,7 @@ flush_dcache_range:
* x0: start address
* x1: end address
*/
-.section .text.invalidate_dcache_range, "ax", %progbits
-.global invalidate_dcache_range
-.type invalidate_dcache_range, %function
-.func invalidate_dcache_range
-.cfi_startproc
-invalidate_dcache_range:
+FUNCTION invalidate_dcache_range
mrs x3, ctr_el0
ubfm x3, x3, #16, #19
mov x2, #4
@@ -199,50 +179,32 @@ invalidate_dcache_range:
b.lo 1b
dsb sy
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
/*
* void __asm_invalidate_icache_all(void) (-> invalidate_icache_inner_shareable)
*
* invalidate all icache entries.
*/
-.section .text.invalidate_icache_all_inner_shareable, "ax", %progbits
-.global invalidate_icache_all_inner_shareable
-.type invalidate_icache_all_inner_shareable, %function
-.func invalidate_icache_all_inner_shareable
-.cfi_startproc
-invalidate_icache_all_inner_shareable:
+FUNCTION invalidate_icache_all_inner_shareable
dsb ish
isb
ic ialluis
dsb ish
isb
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
-.section .text.invalidate_icache_all, "ax", %progbits
-.global invalidate_icache_all
-.type invalidate_icache_all, %function
-.func invalidate_icache_all
-.cfi_startproc
-invalidate_icache_all:
+FUNCTION invalidate_icache_all
dsb sy
isb
ic iallu
dsb sy
isb
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
-.section .text.set_memory_registers_enable_mmu, "ax", %progbits
-.global set_memory_registers_enable_mmu
-.type set_memory_registers_enable_mmu, %function
-.func set_memory_registers_enable_mmu
-.cfi_startproc
-set_memory_registers_enable_mmu:
+FUNCTION set_memory_registers_enable_mmu
msr ttbr0_el2, x0
msr tcr_el2, x1
msr mair_el2, x2
@@ -264,15 +226,9 @@ set_memory_registers_enable_mmu:
isb
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
-.section .text.set_memory_registers_enable_stage2, "ax", %progbits
-.global set_memory_registers_enable_stage2
-.type set_memory_registers_enable_stage2, %function
-.func set_memory_registers_enable_stage2
-.cfi_startproc
-set_memory_registers_enable_stage2:
+FUNCTION set_memory_registers_enable_stage2
msr vttbr_el2, x0
msr vtcr_el2, x1
@@ -292,5 +248,4 @@ set_memory_registers_enable_stage2:
isb
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
diff --git a/thermosphere/src/asm_macros.s b/thermosphere/src/asm_macros.s
new file mode 100644
index 000000000..8289a170e
--- /dev/null
+++ b/thermosphere/src/asm_macros.s
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2018-2019 Atmosphère-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#define EXCEP_STACK_FRAME_SIZE 0x140
+
+#define CORECTX_USER_FRAME_OFFSET 0x000
+#define CORECTX_SCRATCH_OFFSET 0x008
+#define CORECTX_CRASH_STACK_OFFSET 0x010
+
+.macro FUNCTION name
+ .section .text.\name, "ax", %progbits
+ .global \name
+ .type \name, %function
+ .func \name
+ .cfi_sections .debug_frame
+ .cfi_startproc
+ \name:
+.endm
+
+.macro END_FUNCTION
+ .cfi_endproc
+ .endfunc
+.endm
diff --git a/thermosphere/src/breakpoints_watchpoints_load.s b/thermosphere/src/breakpoints_watchpoints_load.s
index 856dcd5ca..11da1d2b0 100644
--- a/thermosphere/src/breakpoints_watchpoints_load.s
+++ b/thermosphere/src/breakpoints_watchpoints_load.s
@@ -14,14 +14,10 @@
* along with this program. If not, see .
*/
+#include "asm_macros.s"
// Precondition: x1 <= 16
-.section .text.loadBreakpointRegs, "ax", %progbits
-.global loadBreakpointRegs
-.type loadBreakpointRegs, %function
-.func loadBreakpointRegs
-.cfi_startproc
-loadBreakpointRegs:
+FUNCTION loadBreakpointRegs
// x1 = number
dmb sy
@@ -42,16 +38,10 @@ loadBreakpointRegs:
dsb sy
isb
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
// Precondition: x1 <= 16
-.section .text.loadWatchpointRegs, "ax", %progbits
-.global loadWatchpointRegs
-.type loadWatchpointRegs, %function
-.func loadWatchpointRegs
-.cfi_startproc
-loadWatchpointRegs:
+FUNCTION loadWatchpointRegs
// x1 = number
dmb sy
@@ -72,5 +62,4 @@ loadWatchpointRegs:
dsb sy
isb
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
diff --git a/thermosphere/src/exception_vectors.s b/thermosphere/src/exception_vectors.s
index 600e6df05..050145918 100644
--- a/thermosphere/src/exception_vectors.s
+++ b/thermosphere/src/exception_vectors.s
@@ -1,12 +1,27 @@
+/*
+ * Copyright (c) 2018-2019 Atmosphère-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#include "asm_macros.s"
+
/* Some macros taken from https://github.com/ARM-software/arm-trusted-firmware/blob/master/include/common/aarch64/asm_macros.S */
/*
* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-
-
-#define STACK_FRAME_SIZE 0x140
/*
* Declare the exception vector table, enforcing it is aligned on a
@@ -53,7 +68,7 @@
.endm
.macro SAVE_MOST_REGISTERS
- sub sp, sp, #STACK_FRAME_SIZE
+ sub sp, sp, #EXCEP_STACK_FRAME_SIZE
stp x28, x29, [sp, #-0x20]
stp x30, xzr, [sp, #-0x10]
@@ -65,12 +80,12 @@
.macro PIVOT_STACK_FOR_CRASH
// Note: x18 assumed uncorrupted
// Note: replace sp_el0 with crashing sp
- str x16, [x18, #8] // currentCoreCtx->scratch = x16
+ str x16, [x18, #CORECTX_SCRATCH_OFFSET]
mov x16, sp
msr sp_el0, x16
- ldr x16, [x18, #0x10] // currentCoreCtx->crashStack
+ ldr x16, [x18, #CORECTX_CRASH_STACK_OFFSET]
mov sp, x16
- ldr x16, [x18, #8]
+ ldr x16, [x18, #CORECTX_SCRATCH_OFFSET]
.endm
.equ EXCEPTION_TYPE_HOST, 0
@@ -88,8 +103,8 @@ vector_entry \name
mov x0, sp
.if \type == EXCEPTION_TYPE_GUEST
- ldp x18, xzr, [sp, #STACK_FRAME_SIZE]
- str x0, [x18] // currentCoreCtx->userFrame
+ ldp x18, xzr, [sp, #EXCEP_STACK_FRAME_SIZE]
+ str x0, [x18, #CORECTX_USER_FRAME_OFFSET]
mov w1, #1
.else
mov w1, #0
@@ -202,7 +217,7 @@ _restoreAllRegisters:
ldp x26, x27, [sp, #0xD0]
ldp x28, x29, [sp, #0xE0]
- add sp, sp, #STACK_FRAME_SIZE
+ add sp, sp, #EXCEP_STACK_FRAME_SIZE
eret
UNKNOWN_EXCEPTION _serrorSp0
diff --git a/thermosphere/src/fpu_regs_load_store.s b/thermosphere/src/fpu_regs_load_store.s
index e4b2364e0..23e1bf921 100644
--- a/thermosphere/src/fpu_regs_load_store.s
+++ b/thermosphere/src/fpu_regs_load_store.s
@@ -14,6 +14,8 @@
* along with this program. If not, see .
*/
+#include "asm_macros.s"
+
.macro LDSTORE_QREGS, op
\op q0, q1, [x0], 0x20
\op q2, q3, [x0], 0x20
@@ -33,12 +35,7 @@
\op q30, q31, [x0], 0x20
.endm
-.section .text.fpuLoadRegistersFromStorage, "ax", %progbits
-.global fpuLoadRegistersFromStorage
-.type fpuLoadRegistersFromStorage, %function
-.func fpuLoadRegistersFromStorage
-.cfi_startproc
-fpuLoadRegistersFromStorage:
+FUNCTION fpuLoadRegistersFromStorage
dmb sy
LDSTORE_QREGS ldp
ldp x1, x2, [x0]
@@ -47,14 +44,9 @@ fpuLoadRegistersFromStorage:
dsb sy
isb sy
ret
-.cfi_endproc
-.endfunc
+END_FUNCTION
-.section .text.fpuStoreRegistersToStorage, "ax", %progbits
-.global fpuStoreRegistersToStorage
-.type fpuStoreRegistersToStorage, %function
-.func fpuStoreRegistersToStorage
-.cfi_startproc
+FUNCTION fpuStoreRegistersToStorage
dsb sy
isb sy
LDSTORE_QREGS stp
@@ -63,5 +55,4 @@ fpuLoadRegistersFromStorage:
stp x1, x2, [x0]
dmb sy
ret
-.cfi_endproc
-.endfunc
+END_FUNCTION
diff --git a/thermosphere/src/spinlock.s b/thermosphere/src/spinlock.s
index 7c0b58428..ee0359629 100644
--- a/thermosphere/src/spinlock.s
+++ b/thermosphere/src/spinlock.s
@@ -14,6 +14,8 @@
* along with this program. If not, see .
*/
+#include "asm_macros.s"
+
// From Arm TF
@@ -23,11 +25,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
-.global spinlockLock
-.type spinlockLock, %function
-.func spinlockLock
-.cfi_startproc
-spinlockLock:
+FUNCTION spinlockLock
mov w2, #1
sevl
l1:
@@ -38,16 +36,10 @@ spinlockLock:
stxr w1, w2, [x0]
cbnz w1, l2
ret
-.endfunc
-.cfi_endproc
+END_FUNCTION
-.global spinlockUnlock
-.type spinlockUnlock, %function
-.func spinlockUnlock
-.cfi_startproc
-spinlockUnlock:
+FUNCTION spinlockUnlock
stlr wzr, [x0]
sev
ret
-.endfunc
-.cfi_endproc
\ No newline at end of file
+END_FUNCTION
diff --git a/thermosphere/src/start.s b/thermosphere/src/start.s
index aec77c1d5..d370bb64a 100644
--- a/thermosphere/src/start.s
+++ b/thermosphere/src/start.s
@@ -14,6 +14,8 @@
* along with this program. If not, see .
*/
+#include "asm_macros.s"
+
.section .crt0, "ax", %progbits
.align 3
.global _start
@@ -71,7 +73,7 @@ _startCommon:
// Save x18, reserve space for exception frame
stp x18, xzr, [sp, #-0x10]!
- sub sp, sp, #0x140
+ sub sp, sp, #EXCEP_STACK_FRAME_SIZE
dsb sy
isb