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fusee: fix sleep/wake on 6.x
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parent
bb11c57e7d
commit
cd62d83586
3 changed files with 48 additions and 37 deletions
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@ -37,23 +37,27 @@
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/* Clock and reset devices. */
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/* Clock and reset devices. */
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typedef enum {
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typedef enum {
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CARDEVICE_BPMP = ((0 << 5) | 0x1),
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CARDEVICE_UARTA = ((0 << 5) | 0x6),
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CARDEVICE_UARTA = ((0 << 5) | 0x6),
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CARDEVICE_UARTB = ((0 << 5) | 0x7),
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CARDEVICE_UARTB = ((0 << 5) | 0x7),
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CARDEVICE_UARTC = ((1 << 5) | 0x17),
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CARDEVICE_I2C1 = ((0 << 5) | 0xC),
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CARDEVICE_I2C1 = ((0 << 5) | 0xC),
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CARDEVICE_USBD = ((0 << 5) | 0x16),
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CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
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CARDEVICE_AHBDMA = ((1 << 5) | 0x1),
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CARDEVICE_APBDMA = ((1 << 5) | 0x2),
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CARDEVICE_KFUSE = ((1 << 5) | 0x8),
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CARDEVICE_I2C5 = ((1 << 5) | 0xF),
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CARDEVICE_I2C5 = ((1 << 5) | 0xF),
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CARDEVICE_UARTC = ((1 << 5) | 0x17),
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CARDEVICE_USB2 = ((1 << 5) | 0x1A),
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CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
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CARDEVICE_TSEC = ((2 << 5) | 0x13),
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CARDEVICE_ACTMON = ((3 << 5) | 0x17),
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CARDEVICE_TZRAM = ((3 << 5) | 0x1E),
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CARDEVICE_TZRAM = ((3 << 5) | 0x1E),
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CARDEVICE_SE = ((3 << 5) | 0x1F),
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CARDEVICE_SE = ((3 << 5) | 0x1F),
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CARDEVICE_HOST1X = ((0 << 5) | 0x1C),
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CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
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CARDEVICE_TSEC = ((2 << 5) | 0x13),
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CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
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CARDEVICE_SOR0 = ((5 << 5) | 0x16),
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CARDEVICE_SOR0 = ((5 << 5) | 0x16),
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CARDEVICE_SOR1 = ((5 << 5) | 0x17),
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CARDEVICE_SOR1 = ((5 << 5) | 0x17),
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CARDEVICE_KFUSE = ((1 << 5) | 0x8),
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CARDEVICE_SOR_SAFE = ((6 << 5) | 0x1E),
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CARDEVICE_CL_DVFS = ((4 << 5) | 0x1B),
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CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
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CARDEVICE_ACTMON = ((3 << 5) | 0x17),
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CARDEVICE_BPMP = ((0 << 5) | 0x1)
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} CarDevice;
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} CarDevice;
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/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
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/* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */
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@ -24,6 +24,7 @@
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#include "nxboot.h"
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#include "nxboot.h"
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#include "nxfs.h"
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#include "nxfs.h"
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#include "bct.h"
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#include "bct.h"
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#include "car.h"
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#include "di.h"
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#include "di.h"
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#include "mc.h"
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#include "mc.h"
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#include "se.h"
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#include "se.h"
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@ -1015,6 +1016,12 @@ uint32_t nxboot_main(void) {
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/* Wait for the splash screen to have been displayed for as long as it should be. */
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/* Wait for the splash screen to have been displayed for as long as it should be. */
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splash_screen_wait_delay();
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splash_screen_wait_delay();
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/* Set reset for USBD, USB2, AHBDMA, and APBDMA. */
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rst_enable(CARDEVICE_USBD);
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rst_enable(CARDEVICE_USB2);
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rst_enable(CARDEVICE_AHBDMA);
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rst_enable(CARDEVICE_APBDMA);
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/* Return the memory address for booting CPU0. */
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/* Return the memory address for booting CPU0. */
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return (uint32_t)exosphere_memaddr;
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return (uint32_t)exosphere_memaddr;
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}
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}
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@ -203,12 +203,12 @@ DEFINE_CLK_RST_REG_BIT_ENUM(RST_CPUG_CMPLX_CLR_CLR_NONCPURESET, 29, DISABLE, ENA
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HANDLER(H, MEM, 1, 0) \
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HANDLER(H, MEM, 1, 0) \
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HANDLER(H, AHBDMA, 1, 1) \
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HANDLER(H, AHBDMA, 1, 1) \
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HANDLER(H, APBDMA, 1, 2) \
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HANDLER(H, APBDMA, 1, 2) \
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HANDLER(H, USB2, 1, 26) \
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HANDLER(H, PMC, 1, 6) \
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HANDLER(H, PMC, 1, 6) \
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HANDLER(H, FUSE, 1, 7) \
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HANDLER(H, FUSE, 1, 7) \
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HANDLER(H, KFUSE, 1, 8) \
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HANDLER(H, KFUSE, 1, 8) \
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HANDLER(H, I2C5, 1, 15) \
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HANDLER(H, I2C5, 1, 15) \
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HANDLER(H, EMC, 1, 25) \
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HANDLER(H, EMC, 1, 25) \
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HANDLER(H, USB2, 1, 26) \
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HANDLER(U, CSITE, 2, 9) \
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HANDLER(U, CSITE, 2, 9) \
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HANDLER(U, IRAMA, 2, 20) \
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HANDLER(U, IRAMA, 2, 20) \
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HANDLER(U, IRAMB, 2, 21) \
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HANDLER(U, IRAMB, 2, 21) \
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