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thermosphere: static inline -> inline

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This commit is contained in:
TuxSH 2020-03-01 16:01:31 +00:00
parent 0126a6417f
commit d4bbb78a27
4 changed files with 16 additions and 16 deletions
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10
thermosphere/src/cpu/hvisor_cpu_caches.hpp
View file

@ -21,13 +21,13 @@
namespace ams::hvisor::cpu { namespace ams::hvisor::cpu {
static inline u32 GetInstructionCachePolicy(void) inline u32 GetInstructionCachePolicy(void)
{ {
u32 ctr = static_cast<u32>(THERMOSPHERE_GET_SYSREG(ctr_el0)); u32 ctr = static_cast<u32>(THERMOSPHERE_GET_SYSREG(ctr_el0));
return (ctr >> 14) & 3; return (ctr >> 14) & 3;
} }
static inline u32 GetSmallestInstructionCacheLineSize(void) inline u32 GetSmallestInstructionCacheLineSize(void)
{ {
u32 ctr = static_cast<u32>(THERMOSPHERE_GET_SYSREG(ctr_el0)); u32 ctr = static_cast<u32>(THERMOSPHERE_GET_SYSREG(ctr_el0));
u32 shift = ctr & 0xF; u32 shift = ctr & 0xF;
@ -35,7 +35,7 @@ namespace ams::hvisor::cpu {
return 4 << shift; return 4 << shift;
} }
static inline u32 GetSmallestDataCacheLineSize(void) inline u32 GetSmallestDataCacheLineSize(void)
{ {
u32 ctr = static_cast<u32>(THERMOSPHERE_GET_SYSREG(ctr_el0)); u32 ctr = static_cast<u32>(THERMOSPHERE_GET_SYSREG(ctr_el0));
u32 shift = (ctr >> 16) & 0xF; u32 shift = (ctr >> 16) & 0xF;
@ -43,13 +43,13 @@ namespace ams::hvisor::cpu {
return 4 << shift; return 4 << shift;
} }
static inline void InvalidateInstructionCache(void) ALWAYS_INLINE void InvalidateInstructionCache(void)
{ {
__asm__ __volatile__ ("ic ialluis" ::: "memory"); __asm__ __volatile__ ("ic ialluis" ::: "memory");
cpu::isb(); cpu::isb();
} }
static inline void InvalidateInstructionCacheLocal(void) ALWAYS_INLINE void InvalidateInstructionCacheLocal(void)
{ {
__asm__ __volatile__ ("ic iallu" ::: "memory"); __asm__ __volatile__ ("ic iallu" ::: "memory");
cpu::isb(); cpu::isb();

6
thermosphere/src/cpu/hvisor_cpu_instructions.hpp
View file

@ -24,8 +24,8 @@
res;\ res;\
}) })
#define DECLARE_SINGLE_ASM_INSN2(name, what) static inline void name() { __asm__ __volatile__ (what ::: "memory"); } #define DECLARE_SINGLE_ASM_INSN2(name, what) ALWAYS_INLINE void name() { __asm__ __volatile__ (what ::: "memory"); }
#define DECLARE_SINGLE_ASM_INSN(name) static inline void name() { __asm__ __volatile__ (STRINGIZE(name) ::: "memory"); } #define DECLARE_SINGLE_ASM_INSN(name) ALWAYS_INLINE void name() { __asm__ __volatile__ (STRINGIZE(name) ::: "memory"); }
namespace ams::hvisor::cpu { namespace ams::hvisor::cpu {
@ -55,7 +55,7 @@ namespace ams::hvisor::cpu {
DECLARE_SINGLE_ASM_INSN2(TlbInvalidateEl1, "tlbi vmalle1is") DECLARE_SINGLE_ASM_INSN2(TlbInvalidateEl1, "tlbi vmalle1is")
DECLARE_SINGLE_ASM_INSN2(TlbInvalidateEl1Stage12, "tlbi alle1is") DECLARE_SINGLE_ASM_INSN2(TlbInvalidateEl1Stage12, "tlbi alle1is")
ALWAYS_INLINE static void TlbInvalidateEl2Page(uintptr_t addr) ALWAYS_INLINE void TlbInvalidateEl2Page(uintptr_t addr)
{ {
__asm__ __volatile__ ("tlbi vae2is, %0" :: "r"(addr) : "memory"); __asm__ __volatile__ ("tlbi vae2is, %0" :: "r"(addr) : "memory");
} }

6
thermosphere/src/cpu/hvisor_cpu_interrupt_mask_guard.hpp
View file

@ -20,21 +20,21 @@
namespace ams::hvisor::cpu { namespace ams::hvisor::cpu {
static inline u64 MaskIrq() ALWAYS_INLINE u64 MaskIrq()
{ {
u64 daif = THERMOSPHERE_GET_SYSREG(daif); u64 daif = THERMOSPHERE_GET_SYSREG(daif);
THERMOSPHERE_SET_SYSREG_IMM(daifset, BIT(1)); THERMOSPHERE_SET_SYSREG_IMM(daifset, BIT(1));
return daif; return daif;
} }
static inline u64 UnmaskIrq() ALWAYS_INLINE u64 UnmaskIrq()
{ {
u64 daif = THERMOSPHERE_GET_SYSREG(daif); u64 daif = THERMOSPHERE_GET_SYSREG(daif);
THERMOSPHERE_SET_SYSREG_IMM(daifclr, BIT(1)); THERMOSPHERE_SET_SYSREG_IMM(daifclr, BIT(1));
return daif; return daif;
} }
static inline void RestoreInterruptFlags(u64 flags) ALWAYS_INLINE void RestoreInterruptFlags(u64 flags)
{ {
THERMOSPHERE_SET_SYSREG(daif, flags); THERMOSPHERE_SET_SYSREG(daif, flags);
} }

10
thermosphere/src/hvisor_guest_timers.hpp
View file

@ -22,12 +22,12 @@
namespace ams::hvisor { namespace ams::hvisor {
static inline u64 ComputeCntvct(const ExceptionStackFrame *frame) inline u64 ComputeCntvct(const ExceptionStackFrame *frame)
{ {
return frame->cntpct_el0 - currentCoreCtx->GetTotalTimeInHypervisor(); return frame->cntpct_el0 - currentCoreCtx->GetTotalTimeInHypervisor();
} }
static inline void WriteEmulatedPhysicalCompareValue(ExceptionStackFrame *frame, u64 val) inline void WriteEmulatedPhysicalCompareValue(ExceptionStackFrame *frame, u64 val)
{ {
// We lied about the value of cntpct, so we need to compute the time delta // We lied about the value of cntpct, so we need to compute the time delta
// the guest actually intended to use... // the guest actually intended to use...
@ -36,7 +36,7 @@ namespace ams::hvisor {
THERMOSPHERE_SET_SYSREG(cntp_cval_el0, frame->cntpct_el0 + (val - vct)); THERMOSPHERE_SET_SYSREG(cntp_cval_el0, frame->cntpct_el0 + (val - vct));
} }
static inline bool CheckRescheduleEmulatedPtimer(ExceptionStackFrame *frame) inline bool CheckRescheduleEmulatedPtimer(ExceptionStackFrame *frame)
{ {
// Evaluate if the timer has really expired in the PoV of the guest kernel. // Evaluate if the timer has really expired in the PoV of the guest kernel.
// If not, reschedule (add missed time delta) it & exit early // If not, reschedule (add missed time delta) it & exit early
@ -53,14 +53,14 @@ namespace ams::hvisor {
return true; return true;
} }
static inline void EnableGuestTimerTraps(void) ALWAYS_INLINE void EnableGuestTimerTraps(void)
{ {
// Disable event streams, trap everything // Disable event streams, trap everything
u64 cnthctl = 0; u64 cnthctl = 0;
THERMOSPHERE_SET_SYSREG(cnthctl_el2, cnthctl); THERMOSPHERE_SET_SYSREG(cnthctl_el2, cnthctl);
} }
static inline void UpdateVirtualOffsetSysreg(void) ALWAYS_INLINE void UpdateVirtualOffsetSysreg(void)
{ {
THERMOSPHERE_SET_SYSREG(cntvoff_el2, currentCoreCtx->GetTotalTimeInHypervisor()); THERMOSPHERE_SET_SYSREG(cntvoff_el2, currentCoreCtx->GetTotalTimeInHypervisor());
} }