mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-05 19:51:45 +00:00
fusee: Fix SDMMC high speed support and other bugs.
This commit is contained in:
parent
eaa282b915
commit
e58927a8ab
6 changed files with 84 additions and 97 deletions
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@ -487,12 +487,12 @@ static int sdmmc_sd_send_op_cond(sdmmc_device_t *device, bool is_sd_ver2, bool i
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return 0;
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/* Delay a bit before asking for the voltage switch. */
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udelay(1000);
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mdelay(100);
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/* Tell the driver to switch the voltage. */
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if (!sdmmc_switch_voltage(device->sdmmc))
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return 0;
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/* We are now running at 1.8V. */
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device->is_180v = true;
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}
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@ -693,15 +693,15 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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/* Adjust the current limit. */
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if (!sdmmc_sd_set_current_limit(device, status))
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return 0;
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/* Invalid bus width. */
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if (device->sdmmc->bus_width != SDMMC_BUS_WIDTH_4BIT)
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return 0;
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/* Get the supported high-speed type. */
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if (!sdmmc_sd_switch(device, 0, 0, 0xF, status))
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return 0;
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/* High-speed SDR104 is supported. */
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if (status[13] & SD_MODE_UHS_SDR104)
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{
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@ -748,6 +748,7 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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else
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return 0;
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/* Peek the SD card's status. */
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return sdmmc_device_send_status(device);
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}
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@ -974,22 +975,22 @@ int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth b
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/* Switch to high-speed from low voltage (if possible). */
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if (!sdmmc_sd_switch_hs_low(device, switch_status))
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{
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sdmmc_error(sdmmc, "Failed to switch to high-speed!");
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sdmmc_error(sdmmc, "Failed to switch to high-speed from low voltage!");
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return 0;
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}
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sdmmc_info(sdmmc, "Switched to high-speed!");
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sdmmc_info(sdmmc, "Switched to high-speed from low voltage!");
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}
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else if ((device->scr.sda_vsn & (SD_SCR_SPEC_VER_1 | SD_SCR_SPEC_VER_2)) && ((bus_speed != SDMMC_SPEED_UNK6)))
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{
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/* Switch to high-speed from high voltage (if possible). */
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if (!sdmmc_sd_switch_hs_high(device, switch_status))
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{
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sdmmc_error(sdmmc, "Failed to switch to high-speed!");
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sdmmc_error(sdmmc, "Failed to switch to high-speed from high voltage!");
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return 0;
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}
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sdmmc_info(sdmmc, "Switched to high-speed!");
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sdmmc_info(sdmmc, "Switched to high-speed from high voltage!");
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}
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/* Correct any inconsistent states. */
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@ -1373,7 +1374,7 @@ int sdmmc_device_mmc_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth
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{
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uint32_t cid[4] = {0};
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uint32_t csd[4] = {0};
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uint8_t *ext_csd = (uint8_t *)SDMMC_BOUNCE_BUFFER_ADDRESS; // TODO: Better way to do this.
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uint8_t ext_csd[512] = {0};
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/* Initialize our device's struct. */
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memset(device, 0, sizeof(sdmmc_device_t));
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@ -549,28 +549,26 @@ static int sdmmc_autocal_config(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
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case SDMMC_3:
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switch (voltage) {
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case SDMMC_VOLTAGE_1V8:
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_PDPU_CONFIG_MASK;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK);
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sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC1_1V8;
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break;
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case SDMMC_VOLTAGE_3V3:
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_PDPU_CONFIG_MASK;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK);
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sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC1_3V3;
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break;
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default:
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sdmmc_error(sdmmc, "microsd does not support voltage %d", voltage);
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sdmmc_error(sdmmc, "uSD does not support requested voltage!");
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return 0;
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}
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break;
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case SDMMC_2:
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case SDMMC_4:
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if (voltage != SDMMC_VOLTAGE_1V8) {
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sdmmc_error(sdmmc, "eMMC can only run at 1V8, but sdmmc struct claims voltage %d", voltage);
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sdmmc_error(sdmmc, "eMMC can only run at 1V8!");
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return 0;
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}
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_PDPU_CONFIG_MASK;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK);
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sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC4_1V8;
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break;
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}
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@ -581,8 +579,8 @@ static int sdmmc_autocal_config(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
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/* Run automatic calibration. */
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static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
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{
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bool restart_sd_clock = false;
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volatile tegra_padctl_t *padctl = padctl_get_regs();
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bool restart_sd_clock = false;
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/* SD clock is enabled. Disable it and restart later. */
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if (sdmmc->is_sd_clk_enabled)
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@ -619,7 +617,7 @@ static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
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while ((sdmmc->regs->auto_cal_status & SDMMC_AUTOCAL_ACTIVE)) {
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/* Ensure we haven't timed out. */
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if (get_time_since(timebase) > SDMMC_AUTOCAL_TIMEOUT) {
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sdmmc_error(sdmmc, "autocal timed out!");
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sdmmc_error(sdmmc, "Auto-calibration timed out!");
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/* Force a register read to refresh the clock control value. */
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sdmmc_get_sd_clock_control(sdmmc);
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@ -642,7 +640,7 @@ static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
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}
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/* Manually clear the autocal enable bit. */
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_ENABLE;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_ENABLE);
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break;
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}
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}
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@ -696,16 +694,9 @@ static int sdmmc_int_clk_enable(sdmmc_t *sdmmc)
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/* Use SDMA by default. */
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sdmmc->regs->host_control &= ~SDHCI_CTRL_DMA_MASK;
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/* Change to ADMA if requested. */
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if (sdmmc->use_adma && (sdmmc->regs->capabilities & SDHCI_CAN_DO_ADMA2)) {
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// TODO: Setting the ADMA flags breaks ADMA...
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/*
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if (sdmmc->regs->capabilities & SDHCI_CAN_64BIT)
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sdmmc->regs->host_control |= SDHCI_CTRL_ADMA64;
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else
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sdmmc->regs->host_control |= SDHCI_CTRL_ADMA32;
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*/
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}
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/* Change to ADMA if possible. */
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if (sdmmc->regs->capabilities & SDHCI_CAN_DO_ADMA2)
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sdmmc->use_adma = true;
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/* Set the timeout to be the maximum value. */
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sdmmc->regs->timeout_control &= 0xF0;
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@ -847,9 +838,9 @@ static int sdmmc_dllcal_run(sdmmc_t *sdmmc)
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is_timeout = (get_time_since(timebase) > 10000);
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}
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/* Clock failed to stabilize. */
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/* Calibration failed. */
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if (is_timeout) {
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sdmmc_error(sdmmc, "ERROR: DLLCAL failed!");
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sdmmc_error(sdmmc, "DLLCAL failed!");
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return 0;
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}
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@ -898,20 +889,23 @@ int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed)
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case SDMMC_SPEED_DDR50:
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case SDMMC_SPEED_SDR50:
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case SDMMC_SPEED_UNK14:
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sdmmc->regs->host_control2 &= SDHCI_CTRL_UHS_MASK;
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sdmmc->regs->host_control2 |= (SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180);
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
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sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR104;
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sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
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break;
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/* 200MHz single-data rate (MMC). */
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case SDMMC_SPEED_HS400:
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sdmmc->regs->host_control2 &= SDHCI_CTRL_UHS_MASK;
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sdmmc->regs->host_control2 |= (SDHCI_CTRL_HS400 | SDHCI_CTRL_VDD_180);
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
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sdmmc->regs->host_control2 |= SDHCI_CTRL_HS400;
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sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
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break;
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/* 25MHz default speed (SD). */
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case SDMMC_SPEED_SDR12:
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sdmmc->regs->host_control2 &= SDHCI_CTRL_UHS_MASK;
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sdmmc->regs->host_control2 |= (SDHCI_CTRL_UHS_SDR12 | SDHCI_CTRL_VDD_180);
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sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
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sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR12;
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sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
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break;
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default:
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@ -1093,7 +1087,7 @@ static int sdmmc_init_controller(sdmmc_t *sdmmc, SdmmcControllerNum controller)
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sdmmc->is_clk_running = false;
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sdmmc->is_sd_clk_enabled = false;
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sdmmc->is_tuning_tap_val_set = false;
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sdmmc->use_adma = true;
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sdmmc->use_adma = false;
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sdmmc->dma_bounce_buf = (uint8_t*)SDMMC_BOUNCE_BUFFER_ADDRESS;
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sdmmc->tap_val = 0;
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sdmmc->internal_divider = 0;
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@ -1206,11 +1200,11 @@ void sdmmc_finish(sdmmc_t *sdmmc)
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sdmmc_select_voltage(sdmmc, SDMMC_VOLTAGE_NONE);
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/* Disable the SD card power. */
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if (sdmmc->controller == SDMMC_1)
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{
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if (sdmmc->controller == SDMMC_1)
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{
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/* Disable GPIO output. */
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gpio_configure_direction(GPIO_MICROSD_SUPPLY_ENABLE, GPIO_DIRECTION_INPUT);
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/* Power cycle for 100ms without power. */
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mdelay(100);
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}
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@ -1749,7 +1743,7 @@ int sdmmc_switch_voltage(sdmmc_t *sdmmc)
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sdmmc_get_sd_clock_control(sdmmc);
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/* Wait a while. */
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udelay(5000);
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mdelay(5);
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/* Host control 2 flag should be set by now. */
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if (sdmmc->regs->host_control2 & SDHCI_CTRL_VDD_180)
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@ -1761,7 +1755,7 @@ int sdmmc_switch_voltage(sdmmc_t *sdmmc)
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sdmmc_get_sd_clock_control(sdmmc);
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/* Wait a while. */
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udelay(1000);
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mdelay(1);
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/* Data level is up. Voltage switching is done.*/
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if (sdmmc->regs->present_state & SDHCI_DATA_LVL_MASK)
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@ -106,7 +106,7 @@ typedef struct {
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uint16_t slot_int_status;
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uint16_t host_version;
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/* vendor specific registers */
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/* Vendor specific registers */
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uint32_t vendor_clock_cntrl;
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uint32_t vendor_sys_sw_cntrl;
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uint32_t vendor_err_intr_status;
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@ -121,12 +121,12 @@ typedef struct {
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uint32_t _0x12c[0x20];
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uint32_t vendor_io_trim_cntrl;
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/* start of sdmmc2/sdmmc4 only */
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/* Start of sdmmc2/sdmmc4 only */
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uint32_t vendor_dllcal_cfg;
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uint32_t vendor_dll_ctrl0;
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uint32_t vendor_dll_ctrl1;
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uint32_t vendor_dllcal_cfg_sta;
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/* end of sdmmc2/sdmmc4 only */
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/* End of sdmmc2/sdmmc4 only */
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uint32_t vendor_tuning_cntrl0;
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uint32_t vendor_tuning_cntrl1;
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@ -487,12 +487,12 @@ static int sdmmc_sd_send_op_cond(sdmmc_device_t *device, bool is_sd_ver2, bool i
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return 0;
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/* Delay a bit before asking for the voltage switch. */
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udelay(1000);
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mdelay(100);
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/* Tell the driver to switch the voltage. */
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if (!sdmmc_switch_voltage(device->sdmmc))
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return 0;
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/* We are now running at 1.8V. */
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device->is_180v = true;
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}
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@ -693,15 +693,15 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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/* Adjust the current limit. */
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if (!sdmmc_sd_set_current_limit(device, status))
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return 0;
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/* Invalid bus width. */
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if (device->sdmmc->bus_width != SDMMC_BUS_WIDTH_4BIT)
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return 0;
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/* Get the supported high-speed type. */
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if (!sdmmc_sd_switch(device, 0, 0, 0xF, status))
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return 0;
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/* High-speed SDR104 is supported. */
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if (status[13] & SD_MODE_UHS_SDR104)
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{
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@ -748,6 +748,7 @@ static int sdmmc_sd_switch_hs_low(sdmmc_device_t *device, uint8_t *status)
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else
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return 0;
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/* Peek the SD card's status. */
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return sdmmc_device_send_status(device);
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}
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@ -974,22 +975,22 @@ int sdmmc_device_sd_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth b
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/* Switch to high-speed from low voltage (if possible). */
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if (!sdmmc_sd_switch_hs_low(device, switch_status))
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{
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sdmmc_error(sdmmc, "Failed to switch to high-speed!");
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sdmmc_error(sdmmc, "Failed to switch to high-speed from low voltage!");
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return 0;
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}
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sdmmc_info(sdmmc, "Switched to high-speed!");
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sdmmc_info(sdmmc, "Switched to high-speed from low voltage!");
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}
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else if ((device->scr.sda_vsn & (SD_SCR_SPEC_VER_1 | SD_SCR_SPEC_VER_2)) && ((bus_speed != SDMMC_SPEED_UNK6)))
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{
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/* Switch to high-speed from high voltage (if possible). */
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if (!sdmmc_sd_switch_hs_high(device, switch_status))
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{
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sdmmc_error(sdmmc, "Failed to switch to high-speed!");
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sdmmc_error(sdmmc, "Failed to switch to high-speed from high voltage!");
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return 0;
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}
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sdmmc_info(sdmmc, "Switched to high-speed!");
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sdmmc_info(sdmmc, "Switched to high-speed from high voltage!");
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}
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/* Correct any inconsistent states. */
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@ -1322,9 +1323,6 @@ static int sdmmc_mmc_select_hs400(sdmmc_device_t *device)
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static int sdmmc_mmc_select_timing(sdmmc_device_t *device, SdmmcBusSpeed bus_speed)
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{
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// FIXME: Tuning is broken. Use HS52 for now.
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return sdmmc_mmc_select_hs(device, false);
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if ((bus_speed == SDMMC_SPEED_HS400) &&
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(device->sdmmc->bus_width == SDMMC_BUS_WIDTH_8BIT) &&
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(device->ext_csd.raw_card_type & EXT_CSD_CARD_TYPE_HS400_1_8V))
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@ -1376,7 +1374,7 @@ int sdmmc_device_mmc_init(sdmmc_device_t *device, sdmmc_t *sdmmc, SdmmcBusWidth
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{
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uint32_t cid[4] = {0};
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uint32_t csd[4] = {0};
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uint8_t *ext_csd = (uint8_t *)SDMMC_BOUNCE_BUFFER_ADDRESS; // TODO: Better way to do this.
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uint8_t ext_csd[512] = {0};
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/* Initialize our device's struct. */
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memset(device, 0, sizeof(sdmmc_device_t));
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@ -549,28 +549,26 @@ static int sdmmc_autocal_config(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
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case SDMMC_3:
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switch (voltage) {
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case SDMMC_VOLTAGE_1V8:
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_PDPU_CONFIG_MASK;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK);
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sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC1_1V8;
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break;
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case SDMMC_VOLTAGE_3V3:
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_PDPU_CONFIG_MASK;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK);
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sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC1_3V3;
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break;
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default:
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sdmmc_error(sdmmc, "microsd does not support voltage %d", voltage);
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sdmmc_error(sdmmc, "uSD does not support requested voltage!");
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return 0;
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}
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break;
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case SDMMC_2:
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case SDMMC_4:
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if (voltage != SDMMC_VOLTAGE_1V8) {
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sdmmc_error(sdmmc, "eMMC can only run at 1V8, but sdmmc struct claims voltage %d", voltage);
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sdmmc_error(sdmmc, "eMMC can only run at 1V8!");
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return 0;
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}
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sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_PDPU_CONFIG_MASK;
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sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_PDPU_CONFIG_MASK);
|
||||
sdmmc->regs->auto_cal_config |= SDMMC_AUTOCAL_PDPU_SDMMC4_1V8;
|
||||
break;
|
||||
}
|
||||
|
@ -581,8 +579,8 @@ static int sdmmc_autocal_config(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
|
|||
/* Run automatic calibration. */
|
||||
static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
|
||||
{
|
||||
bool restart_sd_clock = false;
|
||||
volatile tegra_padctl_t *padctl = padctl_get_regs();
|
||||
bool restart_sd_clock = false;
|
||||
|
||||
/* SD clock is enabled. Disable it and restart later. */
|
||||
if (sdmmc->is_sd_clk_enabled)
|
||||
|
@ -619,7 +617,7 @@ static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
|
|||
while ((sdmmc->regs->auto_cal_status & SDMMC_AUTOCAL_ACTIVE)) {
|
||||
/* Ensure we haven't timed out. */
|
||||
if (get_time_since(timebase) > SDMMC_AUTOCAL_TIMEOUT) {
|
||||
sdmmc_error(sdmmc, "autocal timed out!");
|
||||
sdmmc_error(sdmmc, "Auto-calibration timed out!");
|
||||
|
||||
/* Force a register read to refresh the clock control value. */
|
||||
sdmmc_get_sd_clock_control(sdmmc);
|
||||
|
@ -642,7 +640,7 @@ static void sdmmc_autocal_run(sdmmc_t *sdmmc, SdmmcBusVoltage voltage)
|
|||
}
|
||||
|
||||
/* Manually clear the autocal enable bit. */
|
||||
sdmmc->regs->auto_cal_config &= ~SDMMC_AUTOCAL_ENABLE;
|
||||
sdmmc->regs->auto_cal_config &= ~(SDMMC_AUTOCAL_ENABLE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -696,16 +694,9 @@ static int sdmmc_int_clk_enable(sdmmc_t *sdmmc)
|
|||
/* Use SDMA by default. */
|
||||
sdmmc->regs->host_control &= ~SDHCI_CTRL_DMA_MASK;
|
||||
|
||||
/* Change to ADMA if requested. */
|
||||
if (sdmmc->use_adma && (sdmmc->regs->capabilities & SDHCI_CAN_DO_ADMA2)) {
|
||||
// TODO: Setting the ADMA flags breaks ADMA...
|
||||
/*
|
||||
if (sdmmc->regs->capabilities & SDHCI_CAN_64BIT)
|
||||
sdmmc->regs->host_control |= SDHCI_CTRL_ADMA64;
|
||||
else
|
||||
sdmmc->regs->host_control |= SDHCI_CTRL_ADMA32;
|
||||
*/
|
||||
}
|
||||
/* Change to ADMA if possible. */
|
||||
if (sdmmc->regs->capabilities & SDHCI_CAN_DO_ADMA2)
|
||||
sdmmc->use_adma = true;
|
||||
|
||||
/* Set the timeout to be the maximum value. */
|
||||
sdmmc->regs->timeout_control &= 0xF0;
|
||||
|
@ -847,9 +838,9 @@ static int sdmmc_dllcal_run(sdmmc_t *sdmmc)
|
|||
is_timeout = (get_time_since(timebase) > 10000);
|
||||
}
|
||||
|
||||
/* Clock failed to stabilize. */
|
||||
/* Calibration failed. */
|
||||
if (is_timeout) {
|
||||
sdmmc_error(sdmmc, "ERROR: DLLCAL failed!");
|
||||
sdmmc_error(sdmmc, "DLLCAL failed!");
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -898,20 +889,23 @@ int sdmmc_select_speed(sdmmc_t *sdmmc, SdmmcBusSpeed bus_speed)
|
|||
case SDMMC_SPEED_DDR50:
|
||||
case SDMMC_SPEED_SDR50:
|
||||
case SDMMC_SPEED_UNK14:
|
||||
sdmmc->regs->host_control2 &= SDHCI_CTRL_UHS_MASK;
|
||||
sdmmc->regs->host_control2 |= (SDHCI_CTRL_UHS_SDR104 | SDHCI_CTRL_VDD_180);
|
||||
sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
|
||||
sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR104;
|
||||
sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
|
||||
break;
|
||||
|
||||
/* 200MHz single-data rate (MMC). */
|
||||
case SDMMC_SPEED_HS400:
|
||||
sdmmc->regs->host_control2 &= SDHCI_CTRL_UHS_MASK;
|
||||
sdmmc->regs->host_control2 |= (SDHCI_CTRL_HS400 | SDHCI_CTRL_VDD_180);
|
||||
sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
|
||||
sdmmc->regs->host_control2 |= SDHCI_CTRL_HS400;
|
||||
sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
|
||||
break;
|
||||
|
||||
/* 25MHz default speed (SD). */
|
||||
case SDMMC_SPEED_SDR12:
|
||||
sdmmc->regs->host_control2 &= SDHCI_CTRL_UHS_MASK;
|
||||
sdmmc->regs->host_control2 |= (SDHCI_CTRL_UHS_SDR12 | SDHCI_CTRL_VDD_180);
|
||||
sdmmc->regs->host_control2 &= ~(SDHCI_CTRL_UHS_MASK);
|
||||
sdmmc->regs->host_control2 |= SDHCI_CTRL_UHS_SDR12;
|
||||
sdmmc->regs->host_control2 |= SDHCI_CTRL_VDD_180;
|
||||
break;
|
||||
|
||||
default:
|
||||
|
@ -1093,7 +1087,7 @@ static int sdmmc_init_controller(sdmmc_t *sdmmc, SdmmcControllerNum controller)
|
|||
sdmmc->is_clk_running = false;
|
||||
sdmmc->is_sd_clk_enabled = false;
|
||||
sdmmc->is_tuning_tap_val_set = false;
|
||||
sdmmc->use_adma = true;
|
||||
sdmmc->use_adma = false;
|
||||
sdmmc->dma_bounce_buf = (uint8_t*)SDMMC_BOUNCE_BUFFER_ADDRESS;
|
||||
sdmmc->tap_val = 0;
|
||||
sdmmc->internal_divider = 0;
|
||||
|
@ -1206,11 +1200,11 @@ void sdmmc_finish(sdmmc_t *sdmmc)
|
|||
sdmmc_select_voltage(sdmmc, SDMMC_VOLTAGE_NONE);
|
||||
|
||||
/* Disable the SD card power. */
|
||||
if (sdmmc->controller == SDMMC_1)
|
||||
{
|
||||
if (sdmmc->controller == SDMMC_1)
|
||||
{
|
||||
/* Disable GPIO output. */
|
||||
gpio_configure_direction(GPIO_MICROSD_SUPPLY_ENABLE, GPIO_DIRECTION_INPUT);
|
||||
|
||||
|
||||
/* Power cycle for 100ms without power. */
|
||||
mdelay(100);
|
||||
}
|
||||
|
@ -1749,7 +1743,7 @@ int sdmmc_switch_voltage(sdmmc_t *sdmmc)
|
|||
sdmmc_get_sd_clock_control(sdmmc);
|
||||
|
||||
/* Wait a while. */
|
||||
udelay(5000);
|
||||
mdelay(5);
|
||||
|
||||
/* Host control 2 flag should be set by now. */
|
||||
if (sdmmc->regs->host_control2 & SDHCI_CTRL_VDD_180)
|
||||
|
@ -1761,7 +1755,7 @@ int sdmmc_switch_voltage(sdmmc_t *sdmmc)
|
|||
sdmmc_get_sd_clock_control(sdmmc);
|
||||
|
||||
/* Wait a while. */
|
||||
udelay(1000);
|
||||
mdelay(1);
|
||||
|
||||
/* Data level is up. Voltage switching is done.*/
|
||||
if (sdmmc->regs->present_state & SDHCI_DATA_LVL_MASK)
|
||||
|
|
|
@ -106,7 +106,7 @@ typedef struct {
|
|||
uint16_t slot_int_status;
|
||||
uint16_t host_version;
|
||||
|
||||
/* vendor specific registers */
|
||||
/* Vendor specific registers */
|
||||
uint32_t vendor_clock_cntrl;
|
||||
uint32_t vendor_sys_sw_cntrl;
|
||||
uint32_t vendor_err_intr_status;
|
||||
|
@ -121,12 +121,12 @@ typedef struct {
|
|||
uint32_t _0x12c[0x20];
|
||||
uint32_t vendor_io_trim_cntrl;
|
||||
|
||||
/* start of sdmmc2/sdmmc4 only */
|
||||
/* Start of sdmmc2/sdmmc4 only */
|
||||
uint32_t vendor_dllcal_cfg;
|
||||
uint32_t vendor_dll_ctrl0;
|
||||
uint32_t vendor_dll_ctrl1;
|
||||
uint32_t vendor_dllcal_cfg_sta;
|
||||
/* end of sdmmc2/sdmmc4 only */
|
||||
/* End of sdmmc2/sdmmc4 only */
|
||||
|
||||
uint32_t vendor_tuning_cntrl0;
|
||||
uint32_t vendor_tuning_cntrl1;
|
||||
|
|
Loading…
Reference in a new issue