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ams: fix compilation with gcc 14 (closes #2330)

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Michael Scire 2024-05-26 14:32:11 -07:00 committed by SciresM
parent 548b48b2a6
commit f35c94810c
5 changed files with 13 additions and 11 deletions
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6
fusee/program/source/sdram/fusee_sdram.cpp
View file

@ -1002,14 +1002,16 @@ namespace ams::nxboot {
\ \
constexpr u32 SrcLow = RANGE_LOW(SRC_RANGE); \ constexpr u32 SrcLow = RANGE_LOW(SRC_RANGE); \
constexpr u32 DstLow = RANGE_LOW(DST_RANGE); \ constexpr u32 DstLow = RANGE_LOW(DST_RANGE); \
constexpr auto Shift = (SrcLow < DstLow) ? (DstLow - SrcLow) \
: (SrcLow - DstLow); \
\ \
cur_reg_value &= ~Mask; \ cur_reg_value &= ~Mask; \
if constexpr (SrcLow == DstLow) { \ if constexpr (SrcLow == DstLow) { \
cur_reg_value |= (src_value & Mask); \ cur_reg_value |= (src_value & Mask); \
} else if constexpr (SrcLow < DstLow) { \ } else if constexpr (SrcLow < DstLow) { \
cur_reg_value |= ((src_value << (DstLow - SrcLow)) & Mask); \ cur_reg_value |= ((src_value << Shift) & Mask); \
} else { \ } else { \
cur_reg_value |= ((src_value >> (SrcLow - DstLow)) & Mask); \ cur_reg_value |= ((src_value >> Shift) & Mask); \
} \ } \
} \ } \
} }

8
libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_code_generator.hpp
View file

@ -201,7 +201,7 @@ namespace ams::svc::codegen::impl {
} else if constexpr (Size == 8) { } else if constexpr (Size == 8) {
__asm__ __volatile__("ldr x%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory"); __asm__ __volatile__("ldr x%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory");
} else { } else {
static_assert(Size != Size); static_assert(false, "Invalid Size");
} }
} }
@ -212,7 +212,7 @@ namespace ams::svc::codegen::impl {
} else if constexpr (Size == 8) { } else if constexpr (Size == 8) {
__asm__ __volatile__("ldp x%c[r0], x%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory"); __asm__ __volatile__("ldp x%c[r0], x%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory");
} else { } else {
static_assert(Size != Size); static_assert(false, "Invalid Size");
} }
} }
@ -223,7 +223,7 @@ namespace ams::svc::codegen::impl {
} else if constexpr (Size == 8) { } else if constexpr (Size == 8) {
__asm__ __volatile__("str x%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory"); __asm__ __volatile__("str x%c[r], [sp, %c[offset]]" :: [r]"i"(Reg), [offset]"i"(Offset) : "memory");
} else { } else {
static_assert(Size != Size); static_assert(false, "Invalid Size");
} }
} }
@ -234,7 +234,7 @@ namespace ams::svc::codegen::impl {
} else if constexpr (Size == 8) { } else if constexpr (Size == 8) {
__asm__ __volatile__("stp x%c[r0], x%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory"); __asm__ __volatile__("stp x%c[r0], x%c[r1], [sp, %c[offset]]" :: [r0]"i"(Reg0), [r1]"i"(Reg1), [offset]"i"(Offset) : "memory");
} else { } else {
static_assert(Size != Size); static_assert(false, "Invalid Size");
} }
} }

4
libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_layout_conversion.hpp
View file

@ -461,7 +461,7 @@ namespace ams::svc::codegen::impl {
if constexpr (CodeGenKind == CodeGenerationKind::SvcInvocationToKernelProcedure) { if constexpr (CodeGenKind == CodeGenerationKind::SvcInvocationToKernelProcedure) {
return Operation::ImplType::template CanGenerateCodeForSvcInvocationToKernelProcedure<Operation>(allocator); return Operation::ImplType::template CanGenerateCodeForSvcInvocationToKernelProcedure<Operation>(allocator);
} else { } else {
static_assert(CodeGenKind != CodeGenKind, "Invalid CodeGenerationKind"); static_assert(false, "Invalid CodeGenerationKind");
} }
} }
@ -474,7 +474,7 @@ namespace ams::svc::codegen::impl {
} else if constexpr (CodeGenKind == CodeGenerationKind::KernelProcedureToSvcInvocation) { } else if constexpr (CodeGenKind == CodeGenerationKind::KernelProcedureToSvcInvocation) {
Operation::ImplType::template GenerateCodeForKernelProcedureToSvcInvocation<Operation>(mcg); Operation::ImplType::template GenerateCodeForKernelProcedureToSvcInvocation<Operation>(mcg);
} else { } else {
static_assert(CodeGenKind != CodeGenKind, "Invalid CodeGenerationKind"); static_assert(false, "Invalid CodeGenerationKind");
} }
} }
}; };

2
libraries/libvapours/include/vapours/svc/codegen/impl/svc_codegen_impl_meta_code.hpp
View file

@ -127,7 +127,7 @@ namespace ams::svc::codegen::impl {
META_CODE_OPERATION_KIND_GENERATE_CODE(Pack) META_CODE_OPERATION_KIND_GENERATE_CODE(Pack)
META_CODE_OPERATION_KIND_GENERATE_CODE(Unpack) META_CODE_OPERATION_KIND_GENERATE_CODE(Unpack)
META_CODE_OPERATION_KIND_GENERATE_CODE(LoadStackAddress) META_CODE_OPERATION_KIND_GENERATE_CODE(LoadStackAddress)
else { static_assert(Kind != Kind, "Unknown MetaOperationKind"); } else { static_assert(false, "Unknown MetaOperationKind"); }
#undef META_CODE_OPERATION_KIND_GENERATE_CODE #undef META_CODE_OPERATION_KIND_GENERATE_CODE
} }

4
libraries/libvapours/include/vapours/util/arch/arm64/util_atomic.hpp
View file

@ -157,7 +157,7 @@ namespace ams::util {
} else if constexpr (Order == std::memory_order_acq_rel || Order == std::memory_order_seq_cst) { } else if constexpr (Order == std::memory_order_acq_rel || Order == std::memory_order_seq_cst) {
return ::ams::util::impl::LoadAcquireExclusiveForAtomic(p); return ::ams::util::impl::LoadAcquireExclusiveForAtomic(p);
} else { } else {
static_assert(Order != Order, "Invalid memory order"); static_assert(false, "Invalid memory order");
} }
} }
@ -172,7 +172,7 @@ namespace ams::util {
} else if constexpr (Order == std::memory_order_acq_rel || Order == std::memory_order_seq_cst) { } else if constexpr (Order == std::memory_order_acq_rel || Order == std::memory_order_seq_cst) {
return ::ams::util::impl::StoreReleaseExclusiveForAtomic(p, s); return ::ams::util::impl::StoreReleaseExclusiveForAtomic(p, s);
} else { } else {
static_assert(Order != Order, "Invalid memory order"); static_assert(false, "Invalid memory order");
} }
} }