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https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-05 19:51:45 +00:00
dmnt: implement debug log opcode
This commit is contained in:
Michael Scire
parent
c2cb94062a
commit
f38965d0bd
2 changed files with 235 additions and 67 deletions
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@ -14,12 +14,27 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <sys/stat.h>
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#include <switch.h>
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#include "dmnt_cheat_types.hpp"
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#include "dmnt_cheat_vm.hpp"
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#include "dmnt_cheat_manager.hpp"
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#include "dmnt_hid.hpp"
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void DmntCheatVm::DebugLog(u32 log_id, u64 value) {
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/* Just unconditionally try to create the log folder. */
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mkdir("/atmosphere/cheat_vm_logs", 0777);
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FILE *f_log = NULL;
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{
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char log_path[FS_MAX_PATH];
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snprintf(log_path, sizeof(log_path), "/atmosphere/cheat_vm_logs/%x.log", log_id);
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f_log = fopen(log_path, "ab");
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}
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if (f_log != NULL) {
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ON_SCOPE_EXIT { fclose(f_log); };
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fprintf(f_log, "%016lx\n", value);
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}
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}
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void DmntCheatVm::OpenDebugLogFile() {
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#ifdef DMNT_CHEAT_VM_DEBUG_LOG
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@ -201,6 +216,37 @@ void DmntCheatVm::LogOpcode(const CheatVmOpcode *opcode) {
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this->LogToDebugFile("Act[%02x]: %d\n", i, opcode->save_restore_regmask.should_operate[i]);
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}
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break;
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case CheatVmOpcodeType_DebugLog:
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this->LogToDebugFile("Opcode: Debug Log\n");
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this->LogToDebugFile("Bit Width: %x\n", opcode->debug_log.bit_width);
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this->LogToDebugFile("Log ID: %x\n", opcode->debug_log.log_id);
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this->LogToDebugFile("Val Type: %x\n", opcode->debug_log.val_type);
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switch (opcode->debug_log.val_type) {
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case DebugLogValueType_RegisterValue:
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this->LogToDebugFile("Val Type: Register Value\n");
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this->LogToDebugFile("X Reg Idx: %x\n", opcode->debug_log.val_reg_index);
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break;
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case DebugLogValueType_MemoryRelAddr:
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this->LogToDebugFile("Val Type: Memory Relative Address\n");
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this->LogToDebugFile("Mem Type: %x\n", opcode->debug_log.mem_type);
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this->LogToDebugFile("Rel Addr: %lx\n", opcode->debug_log.rel_address);
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break;
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case DebugLogValueType_MemoryOfsReg:
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this->LogToDebugFile("Val Type: Memory Offset Register\n");
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this->LogToDebugFile("Mem Type: %x\n", opcode->debug_log.mem_type);
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this->LogToDebugFile("O Reg Idx: %x\n", opcode->debug_log.ofs_reg_index);
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break;
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case DebugLogValueType_RegisterRelAddr:
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this->LogToDebugFile("Val Type: Register Relative Address\n");
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this->LogToDebugFile("A Reg Idx: %x\n", opcode->debug_log.addr_reg_index);
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this->LogToDebugFile("Rel Addr: %lx\n", opcode->debug_log.rel_address);
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break;
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case DebugLogValueType_RegisterOfsReg:
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this->LogToDebugFile("Val Type: Register Offset Register\n");
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this->LogToDebugFile("A Reg Idx: %x\n", opcode->debug_log.addr_reg_index);
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this->LogToDebugFile("O Reg Idx: %x\n", opcode->debug_log.ofs_reg_index);
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break;
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}
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default:
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this->LogToDebugFile("Unknown opcode: %x\n", opcode->opcode);
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break;
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@ -503,6 +549,51 @@ bool DmntCheatVm::DecodeNextOpcode(CheatVmOpcode *out) {
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}
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}
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break;
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case CheatVmOpcodeType_DebugLog:
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{
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/* FFFTIX## */
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/* FFFTI0Ma aaaaaaaa */
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/* FFFTI1Mr */
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/* FFFTI2Ra aaaaaaaa */
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/* FFFTI3Rr */
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/* FFFTI4X0 */
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/* FFF = opcode 0xFFF */
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/* T = bit width. */
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/* I = log id. */
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/* X = value operand type, 0 = main/heap with relative offset, 1 = main/heap with offset register, */
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/* 2 = register with relative offset, 3 = register with offset register, 4 = register value. */
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/* M = memory type. */
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/* R = address register. */
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/* a = relative address. */
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/* r = offset register. */
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/* X = value register. */
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opcode.debug_log.bit_width = (first_dword >> 16) & 0xF;
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opcode.debug_log.log_id = ((first_dword >> 12) & 0xF);
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opcode.debug_log.val_type = (DebugLogValueType)((first_dword >> 8) & 0xF);
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switch (opcode.debug_log.val_type) {
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case DebugLogValueType_RegisterValue:
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opcode.debug_log.val_reg_index = ((first_dword >> 4) & 0xF);
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break;
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case DebugLogValueType_MemoryRelAddr:
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opcode.debug_log.mem_type = (MemoryAccessType)((first_dword >> 4) & 0xF);
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opcode.debug_log.rel_address = (((u64)(first_dword & 0xF) << 32ul) | ((u64)GetNextDword()));
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break;
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case DebugLogValueType_MemoryOfsReg:
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opcode.debug_log.mem_type = (MemoryAccessType)((first_dword >> 4) & 0xF);
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opcode.debug_log.ofs_reg_index = (first_dword & 0xF);
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break;
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case DebugLogValueType_RegisterRelAddr:
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opcode.debug_log.addr_reg_index = ((first_dword >> 4) & 0xF);
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opcode.debug_log.rel_address = (((u64)(first_dword & 0xF) << 32ul) | ((u64)GetNextDword()));
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break;
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case DebugLogValueType_RegisterOfsReg:
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opcode.debug_log.addr_reg_index = ((first_dword >> 4) & 0xF);
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opcode.debug_log.ofs_reg_index = (first_dword & 0xF);
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break;
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}
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}
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break;
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case CheatVmOpcodeType_ExtendedWidth:
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case CheatVmOpcodeType_DoubleExtendedWidth:
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default:
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@ -1062,6 +1153,57 @@ void DmntCheatVm::Execute(const CheatProcessMetadata *metadata) {
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}
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}
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break;
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case CheatVmOpcodeType_DebugLog:
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{
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/* Read value from memory. */
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u64 log_value = 0;
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if (cur_opcode.debug_log.val_type == DebugLogValueType_RegisterValue) {
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switch (cur_opcode.debug_log.bit_width) {
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case 1:
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log_value = static_cast<u8>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFul);
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break;
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case 2:
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log_value = static_cast<u16>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFul);
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break;
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case 4:
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log_value = static_cast<u32>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFFFFFul);
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break;
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case 8:
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log_value = static_cast<u64>(this->registers[cur_opcode.debug_log.val_reg_index] & 0xFFFFFFFFFFFFFFFFul);
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break;
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}
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} else {
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u64 val_address = 0;
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switch (cur_opcode.debug_log.val_type) {
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case DebugLogValueType_MemoryRelAddr:
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val_address = GetCheatProcessAddress(metadata, cur_opcode.debug_log.mem_type, cur_opcode.debug_log.rel_address);
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break;
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case DebugLogValueType_MemoryOfsReg:
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val_address = GetCheatProcessAddress(metadata, cur_opcode.debug_log.mem_type, this->registers[cur_opcode.debug_log.ofs_reg_index]);
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break;
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case DebugLogValueType_RegisterRelAddr:
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val_address = this->registers[cur_opcode.debug_log.addr_reg_index] + cur_opcode.debug_log.rel_address;
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break;
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case DebugLogValueType_RegisterOfsReg:
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val_address = this->registers[cur_opcode.debug_log.addr_reg_index] + this->registers[cur_opcode.debug_log.ofs_reg_index];
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break;
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default:
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break;
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}
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switch (cur_opcode.debug_log.bit_width) {
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case 1:
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case 2:
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case 4:
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case 8:
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DmntCheatManager::ReadCheatProcessMemoryForVm(val_address, &log_value, cur_opcode.debug_log.bit_width);
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break;
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}
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}
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/* Log value. */
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this->DebugLog(cur_opcode.debug_log.log_id, log_value);
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}
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break;
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default:
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/* By default, we do a no-op. */
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break;
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@ -49,6 +49,9 @@ enum CheatVmOpcodeType : u32 {
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/* This is a meta entry, and not a real opcode. */
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/* This is to facilitate multi-nybble instruction decoding. */
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CheatVmOpcodeType_DoubleExtendedWidth = 0xF0,
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/* Double-extended width opcodes. */
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CheatVmOpcodeType_DebugLog = 0xFFF,
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};
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enum MemoryAccessType : u32 {
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@ -106,6 +109,14 @@ enum SaveRestoreRegisterOpType : u32 {
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SaveRestoreRegisterOpType_ClearRegs = 3,
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};
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enum DebugLogValueType : u32 {
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DebugLogValueType_MemoryRelAddr = 0,
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DebugLogValueType_MemoryOfsReg = 1,
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DebugLogValueType_RegisterRelAddr = 2,
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DebugLogValueType_RegisterOfsReg = 3,
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DebugLogValueType_RegisterValue = 4,
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};
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union VmInt {
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u8 bit8;
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u16 bit16;
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@ -215,6 +226,17 @@ struct SaveRestoreRegisterMaskOpcode {
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bool should_operate[0x10];
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};
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struct DebugLogOpcode {
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u32 bit_width;
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u32 log_id;
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DebugLogValueType val_type;
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MemoryAccessType mem_type;
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u32 addr_reg_index;
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u32 val_reg_index;
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u32 ofs_reg_index;
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u64 rel_address;
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};
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struct CheatVmOpcode {
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CheatVmOpcodeType opcode;
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bool begin_conditional_block;
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@ -233,6 +255,7 @@ struct CheatVmOpcode {
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BeginRegisterConditionalOpcode begin_reg_cond;
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SaveRestoreRegisterOpcode save_restore_reg;
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SaveRestoreRegisterMaskOpcode save_restore_regmask;
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DebugLogOpcode debug_log;
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};
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};
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@ -254,6 +277,9 @@ class DmntCheatVm {
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void SkipConditionalBlock();
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void ResetState();
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/* For implementing the DebugLog opcode. */
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void DebugLog(u32 log_id, u64 value);
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/* For debugging. These will be IFDEF'd out normally. */
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void OpenDebugLogFile();
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void CloseDebugLogFile();
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