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https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-22 20:06:40 +00:00
kernelldr: miscellaneous fixes
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parent
3c7c1fbd8a
commit
f78653d815
7 changed files with 45 additions and 42 deletions
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@ -77,11 +77,11 @@ namespace ams::kern::init {
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}
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protected:
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constexpr ALWAYS_INLINE u64 GetBits(size_t offset, size_t count) const {
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return (this->attributes >> offset) & ((1 << count) - 1);
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return (this->attributes >> offset) & ((1ul << count) - 1);
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}
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constexpr ALWAYS_INLINE u64 SelectBits(size_t offset, size_t count) const {
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return this->attributes & (((1 << count) - 1) << offset);
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return this->attributes & (((1ul << count) - 1) << offset);
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}
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public:
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constexpr ALWAYS_INLINE bool IsUserExecuteNever() const { return this->GetBits(54, 1) != 0; }
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@ -128,9 +128,9 @@ namespace ams::kern::init {
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return this->SelectBits(12, 36);
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}
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constexpr ALWAYS_INLINE bool IsCompatibleWithAttribute(const PageTableEntry &rhs) const {
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constexpr ALWAYS_INLINE bool IsCompatibleWithAttribute(const PageTableEntry &rhs, bool contig) const {
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/* Check whether this has the same permission/etc as the desired attributes. */
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return (this->GetBlock() | rhs.GetRawAttributes()) == this->GetRawAttributes();
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return L1PageTableEntry(this->GetBlock(), rhs, contig).GetRawAttributes() == this->GetRawAttributes();
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}
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};
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@ -156,16 +156,16 @@ namespace ams::kern::init {
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return this->SelectBits(12, 36);
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}
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constexpr ALWAYS_INLINE bool IsCompatibleWithAttribute(const PageTableEntry &rhs) const {
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constexpr ALWAYS_INLINE bool IsCompatibleWithAttribute(const PageTableEntry &rhs, bool contig) const {
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/* Check whether this has the same permission/etc as the desired attributes. */
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return (this->GetBlock() | rhs.GetRawAttributes()) == this->GetRawAttributes();
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return L2PageTableEntry(this->GetBlock(), rhs, contig).GetRawAttributes() == this->GetRawAttributes();
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}
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};
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class L3PageTableEntry : public PageTableEntry {
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public:
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constexpr ALWAYS_INLINE L3PageTableEntry(KPhysicalAddress phys_addr, const PageTableEntry &attr, bool contig)
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: PageTableEntry(attr, (static_cast<u64>(contig) << 52) | GetInteger(phys_addr) | 0x1)
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: PageTableEntry(attr, (static_cast<u64>(contig) << 52) | GetInteger(phys_addr) | 0x3)
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{
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/* ... */
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}
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@ -176,9 +176,9 @@ namespace ams::kern::init {
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return this->SelectBits(12, 36);
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}
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constexpr ALWAYS_INLINE bool IsCompatibleWithAttribute(const PageTableEntry &rhs) const {
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constexpr ALWAYS_INLINE bool IsCompatibleWithAttribute(const PageTableEntry &rhs, bool contig) const {
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/* Check whether this has the same permission/etc as the desired attributes. */
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return (this->GetBlock() | rhs.GetRawAttributes()) == this->GetRawAttributes();
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return L3PageTableEntry(this->GetBlock(), rhs, contig).GetRawAttributes() == this->GetRawAttributes();
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}
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};
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@ -247,7 +247,7 @@ namespace ams::kern::init {
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if (!l1_entry->IsTable()) {
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KPhysicalAddress new_table = allocator.Allocate();
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ClearNewPageTable(new_table);
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*l1_entry = L1PageTableEntry(phys_addr, attr.IsPrivilegedExecuteNever());
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*l1_entry = L1PageTableEntry(new_table, attr.IsPrivilegedExecuteNever());
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cpu::DataSynchronizationBarrierInnerShareable();
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}
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@ -281,7 +281,7 @@ namespace ams::kern::init {
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if (!l2_entry->IsTable()) {
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KPhysicalAddress new_table = allocator.Allocate();
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ClearNewPageTable(new_table);
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*l2_entry = L2PageTableEntry(phys_addr, attr.IsPrivilegedExecuteNever());
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*l2_entry = L2PageTableEntry(new_table, attr.IsPrivilegedExecuteNever());
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cpu::DataSynchronizationBarrierInnerShareable();
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}
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@ -373,7 +373,7 @@ namespace ams::kern::init {
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const KPhysicalAddress block = l1_entry->GetBlock();
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(GetInteger(virt_addr), L1BlockSize));
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(size, L1BlockSize));
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MESOSPHERE_ABORT_UNLESS(l1_entry->IsCompatibleWithAttribute(attr_before));
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MESOSPHERE_ABORT_UNLESS(l1_entry->IsCompatibleWithAttribute(attr_before, false));
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/* Invalidate the existing L1 block. */
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*static_cast<PageTableEntry *>(l1_entry) = InvalidPageTableEntry;
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@ -404,7 +404,7 @@ namespace ams::kern::init {
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/* Invalidate the existing contiguous L2 block. */
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for (size_t i = 0; i < L2ContiguousBlockSize / L2BlockSize; i++) {
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/* Ensure that the entry is valid. */
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MESOSPHERE_ABORT_UNLESS(l2_entry[i].IsCompatibleWithAttribute(attr_before));
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MESOSPHERE_ABORT_UNLESS(l2_entry[i].IsCompatibleWithAttribute(attr_before, true));
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static_cast<PageTableEntry *>(l2_entry)[i] = InvalidPageTableEntry;
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}
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cpu::DataSynchronizationBarrierInnerShareable();
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@ -422,7 +422,7 @@ namespace ams::kern::init {
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(GetInteger(virt_addr), L2BlockSize));
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(GetInteger(block), L2BlockSize));
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(size, L2BlockSize));
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MESOSPHERE_ABORT_UNLESS(l2_entry->IsCompatibleWithAttribute(attr_before));
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MESOSPHERE_ABORT_UNLESS(l2_entry->IsCompatibleWithAttribute(attr_before, false));
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/* Invalidate the existing L2 block. */
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*static_cast<PageTableEntry *>(l2_entry) = InvalidPageTableEntry;
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@ -456,7 +456,7 @@ namespace ams::kern::init {
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/* Invalidate the existing contiguous L3 block. */
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for (size_t i = 0; i < L3ContiguousBlockSize / L3BlockSize; i++) {
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/* Ensure that the entry is valid. */
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MESOSPHERE_ABORT_UNLESS(l3_entry[i].IsCompatibleWithAttribute(attr_before));
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MESOSPHERE_ABORT_UNLESS(l3_entry[i].IsCompatibleWithAttribute(attr_before, true));
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static_cast<PageTableEntry *>(l3_entry)[i] = InvalidPageTableEntry;
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}
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cpu::DataSynchronizationBarrierInnerShareable();
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@ -474,7 +474,7 @@ namespace ams::kern::init {
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(GetInteger(virt_addr), L3BlockSize));
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(GetInteger(block), L3BlockSize));
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(size, L3BlockSize));
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MESOSPHERE_ABORT_UNLESS(l3_entry->IsCompatibleWithAttribute(attr_before));
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MESOSPHERE_ABORT_UNLESS(l3_entry->IsCompatibleWithAttribute(attr_before, false));
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/* Invalidate the existing L3 block. */
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*static_cast<PageTableEntry *>(l3_entry) = InvalidPageTableEntry;
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@ -55,7 +55,7 @@ namespace ams::kern::arm64::cpu {
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ALWAYS_INLINE GenericRegisterAccessor(u64 v) : value(v) { /* ... */ }
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protected:
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constexpr ALWAYS_INLINE u64 GetBits(size_t offset, size_t count) const {
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return (this->value >> offset) & ((1 << count) - 1);
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return (this->value >> offset) & ((1ul << count) - 1);
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}
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};
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@ -86,13 +86,11 @@ namespace ams::kern {
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}
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u64 KSystemControl::GenerateRandomRange(u64 min, u64 max) {
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/* This is a biased random, but this is okay for now. */
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/* TODO: unbiased random? */
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const u64 range_size = ((max + 1) - min);
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const u64 effective_max = (std::numeric_limits<u64>::max() / range_size) * range_size;
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while (true) {
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if (const u64 rnd = GenerateRandomU64(); rnd < effective_max) {
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return rnd % effective_max;
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return min + (rnd % range_size);
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}
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}
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}
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@ -83,7 +83,7 @@ namespace ams::kern::smc {
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void GenerateRandomBytes(void *dst, size_t size) {
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/* Call SmcGenerateRandomBytes() */
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/* TODO: Lock this to ensure only one core calls at once. */
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SecureMonitorArguments args = { FunctionId_GetConfig, size };
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SecureMonitorArguments args = { FunctionId_GenerateRandomBytes, size };
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MESOSPHERE_ABORT_UNLESS(size <= sizeof(args) - sizeof(args.x[0]));
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CallPrivilegedSecureMonitorFunction(args);
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MESOSPHERE_ABORT_UNLESS((static_cast<SmcResult>(args.x[0]) == SmcResult::Success));
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@ -21,20 +21,6 @@ namespace ams::util {
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template<char A, char B, char C, char D>
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struct FourCC {
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/* TODO: C++20 std::endian */
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static constexpr u32 Code = (static_cast<u32>(A) << 0x18) |
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(static_cast<u32>(B) << 0x10) |
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(static_cast<u32>(C) << 0x08) |
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(static_cast<u32>(D) << 0x00);
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static constexpr const char String[] = {D, C, B, A};
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static_assert(sizeof(Code) == 4);
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static_assert(sizeof(String) == 4);
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};
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template<char A, char B, char C, char D>
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struct ReverseFourCC {
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/* TODO: C++20 std::endian */
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static constexpr u32 Code = (static_cast<u32>(A) << 0x00) |
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(static_cast<u32>(B) << 0x08) |
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@ -47,4 +33,18 @@ namespace ams::util {
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static_assert(sizeof(String) == 4);
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};
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template<char A, char B, char C, char D>
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struct ReverseFourCC {
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/* TODO: C++20 std::endian */
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static constexpr u32 Code = (static_cast<u32>(A) << 0x18) |
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(static_cast<u32>(B) << 0x10) |
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(static_cast<u32>(C) << 0x08) |
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(static_cast<u32>(D) << 0x00);
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static constexpr const char String[] = {D, C, B, A};
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static_assert(sizeof(Code) == 4);
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static_assert(sizeof(String) == 4);
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};
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}
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@ -44,8 +44,10 @@ namespace ams::kern::init::loader {
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this->next_address = address;
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}
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ALWAYS_INLINE void Finalize() {
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ALWAYS_INLINE uintptr_t Finalize() {
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const uintptr_t final_address = this->next_address;
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this->next_address = Null<uintptr_t>;
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return final_address;
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}
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public:
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virtual KPhysicalAddress Allocate() override {
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@ -255,10 +257,10 @@ namespace ams::kern::init::loader {
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/* We don't have ams::os, this may go in hw:: or something. */
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const uintptr_t rx_offset = layout->rx_offset;
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const uintptr_t rx_end_offset = layout->rx_end_offset;
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const uintptr_t ro_offset = layout->rx_offset;
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const uintptr_t ro_offset = layout->ro_offset;
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const uintptr_t ro_end_offset = layout->ro_end_offset;
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const uintptr_t rw_offset = layout->rx_offset;
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const uintptr_t rw_end_offset = layout->rw_end_offset;
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const uintptr_t rw_offset = layout->rw_offset;
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/* UNUSED: const uintptr_t rw_end_offset = layout->rw_end_offset; */
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const uintptr_t bss_end_offset = layout->bss_end_offset;
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(rx_offset, 0x1000));
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MESOSPHERE_ABORT_UNLESS(util::IsAligned(rx_end_offset, 0x1000));
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@ -315,7 +317,7 @@ namespace ams::kern::init::loader {
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ttbr1_table.Map(virtual_base_address + rw_offset, bss_end_offset - rw_offset, base_address + rw_offset, KernelRwDataAttribute, g_initial_page_allocator);
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/* Clear kernel .bss. */
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std::memset(GetVoidPointer(virtual_base_address + bss_offset), 0, bss_end_offset - rw_end_offset);
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std::memset(GetVoidPointer(virtual_base_address + bss_offset), 0, bss_end_offset - bss_offset);
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/* Apply relocations to the kernel. */
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const Elf::Elf64::Dyn *kernel_dynamic = reinterpret_cast<const Elf::Elf64::Dyn *>(GetInteger(virtual_base_address) + dynamic_offset);
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@ -331,8 +333,8 @@ namespace ams::kern::init::loader {
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return GetInteger(virtual_base_address) - base_address;
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}
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void Finalize() {
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g_initial_page_allocator.Finalize();
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uintptr_t Finalize() {
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return g_initial_page_allocator.Finalize();
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}
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}
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@ -78,6 +78,9 @@ _start:
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/* Call ams::kern::init::loader::Finalize() */
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bl _ZN3ams4kern4init6loader8FinalizeEv
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/* X0 is now the next address for the page allocator. */
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/* We will return this to the kernel. */
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/* Return to the newly-relocated kernel. */
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ldr x1, [sp, #0x18] /* Return address to Kernel */
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ldr x2, [sp, #0x00] /* Relocated kernel base address diff. */
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