8 commits

Author	SHA1	Message	Date
Michael Scire	6a53726833	strat: build sysmodules with -Wextra/-Werror	2021-10-06 23:22:54 -07:00
Michael Scire	4866e80769	svc: refactor/rename MemoryInfo fields	2021-10-05 15:16:54 -07:00
Michael Scire	77fe5cf6f5	ams: the copyright^H^H^H^H^H^H^Hmplex plane is the algebraic closure of the reals	2021-10-04 12:59:10 -07:00
Michael Scire	05ea0c53d7	dmnt: use hardware single step extension if available	2021-09-11 19:41:47 -07:00
Michael Scire	904ab19823	dmnt: implement remaining basic gdbstub packets	2021-09-11 19:41:47 -07:00
Michael Scire	534c2c76f5	dmnt: reload modules on NRO load/unload	2021-09-11 19:41:47 -07:00
Michael Scire	d216a77187	dmnt: first pass at breakpoints/watchpoints	2021-09-11 19:41:47 -07:00
Michael Scire	1401f3520e	dmnt: refactor to use process accessor	2021-09-11 19:41:47 -07:00