9 commits

Author	SHA1	Message	Date
Michael Scire	77fe5cf6f5	ams: the copyright^H^H^H^H^H^H^Hmplex plane is the algebraic closure of the reals	2021-10-04 12:59:10 -07:00
Michael Scire	669564b022	fusee-cpp: implement SecureInitialize besides InitializeClock()	2021-09-06 16:26:50 -07:00
SciresM	166318ba77	sdmmc: implement driver suitable for fs + bootloader ... * sdmmc: begin skeletoning sdmmc driver * sdmmc: add most of SdHostStandardController * sdmmc: implement most of SdmmcController * sdmmc: Sdmmc2Controller * sdmmc: skeleton implementation of Sdmmc1Controller * sdmmc: complete abstract logic for Sdmmc1 power controller * sdmmc: implement gpio handling for sdmmc1-register-control * sdmmc: implement pinmux handling for sdmmc1-register-control * sdmmc: fix building for arm32 and in stratosphere context * sdmmc: implement voltage enable/set for sdmmc1-register-control * util: move T(V)SNPrintf from kernel to util * sdmmc: implement BaseDeviceAccessor * sdmmc: implement MmcDeviceAccessor * sdmmc: implement clock reset controller for register api * sdmmc: fix bug in WaitWhileCommandInhibit, add mmc accessors * exo: add sdmmc test program * sdmmc: fix speed mode extension, add CheckMmcConnection for debug * sdmmc: add DeviceDetector, gpio: implement client api * gpio: modernize client api instead of doing it the lazy way * sdmmc: SdCardDeviceAccessor impl * sdmmc: update test program to read first two sectors of sd card * sdmmc: fix vref sel * sdmmc: finish outward-facing api (untested) * ams: changes for libvapours including tegra register defs * sdmmc: remove hwinit	2020-10-30 11:54:30 -07:00
Michael Scire	6c145d76c7	exo2: implement SmcIramCopy/reboot to payload/rcm	2020-06-14 22:07:45 -07:00
Michael Scire	ad664daea5	exo2: implement remainder of warmboot tz code	2020-06-14 22:07:45 -07:00
Michael Scire	f391354415	exo2: implement through package2 decryption	2020-06-14 22:07:45 -07:00
Michael Scire	e11fad6598	exo2: implement through boot config load/validate	2020-06-14 22:07:45 -07:00
Michael Scire	cbcd1d87fb	exo2: implement through end of random cache init	2020-06-14 22:07:45 -07:00
Michael Scire	f66b41c027	exo2: Initial work on the exosphere rewrite. ... exo2: Implement uncompressor stub and boot code up to Main(). exo2: implement some more init (uart/gic) exo2: implement more of init exo2: improve reg api, add keyslot flag setters exo2: implement se aes decryption/enc exo2: fix bugs in loader stub/mmu mappings exo2: start skeletoning bootconfig/global context types arch: fix makefile flags exo2: implement through master key derivation exo2: implement device master keygen exo2: more init through start of SetupSocSecurity exo2: implement pmc secure scratch management se: implement sticky bit validation libexosphere: fix building for arm32 libexo: fix makefile flags libexo: support building for arm64/arm sc7fw: skeleton binary sc7fw: skeleton a little more sc7fw: implement all non-dram functionality exo2: fix DivideUp error sc7fw: implement more dram code, fix reg library errors sc7fw: complete sc7fw impl. exo2: skeleton the rest of SetupSocSecurity exo2: implement fiq interrupt handler exo2: implement all exception handlers exo2: skeleton the entire smc api, implement the svc invoker exo2: implement rest of SetupSocSecurity exo2: correct slave security errors exo2: fix register definition exo2: minor fixes	2020-06-14 22:07:45 -07:00