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5 commits

Author SHA1 Message Date
Michael Scire
69f9fb8713 exo: receive saved lcd vendor from bl 2020-11-18 15:08:44 -08:00
Michael Scire
99e0448f30 exo2: cache soc type/hardware type for quick lookup 2020-06-14 22:07:45 -07:00
Michael Scire
8c4c1db506 exo2: minor fixes, now completes main and receives SMCs on hw 2020-06-14 22:07:45 -07:00
Michael Scire
e11fad6598 exo2: implement through boot config load/validate 2020-06-14 22:07:45 -07:00
Michael Scire
f66b41c027 exo2: Initial work on the exosphere rewrite.
exo2: Implement uncompressor stub and boot code up to Main().

exo2: implement some more init (uart/gic)

exo2: implement more of init

exo2: improve reg api, add keyslot flag setters

exo2: implement se aes decryption/enc

exo2: fix bugs in loader stub/mmu mappings

exo2: start skeletoning bootconfig/global context types

arch: fix makefile flags

exo2: implement through master key derivation

exo2: implement device master keygen

exo2: more init through start of SetupSocSecurity

exo2: implement pmc secure scratch management

se: implement sticky bit validation

libexosphere: fix building for arm32

libexo: fix makefile flags

libexo: support building for arm64/arm

sc7fw: skeleton binary

sc7fw: skeleton a little more

sc7fw: implement all non-dram functionality

exo2: fix DivideUp error

sc7fw: implement more dram code, fix reg library errors

sc7fw: complete sc7fw impl.

exo2: skeleton the rest of SetupSocSecurity

exo2: implement fiq interrupt handler

exo2: implement all exception handlers

exo2: skeleton the entire smc api, implement the svc invoker

exo2: implement rest of SetupSocSecurity

exo2: correct slave security errors

exo2: fix register definition

exo2: minor fixes
2020-06-14 22:07:45 -07:00