15 commits

Author	SHA1	Message	Date
TuxSH	cbf3b305ca	thermosphere: gdb add break & vCont handling	2021-02-19 21:52:00 +00:00
TuxSH	418cabbd53	thermosphere: add esr_el2 to exception frame	2021-02-19 21:51:53 +00:00
TuxSH	626f0ecb98	thermosphere: major refactor of memory map ... - use recursive stage 1 page table (thanks @fincs for this idea) - NULL now unmapped - no identity mapping - image + GICv2 now mapped at the same address for every platform - tempbss mapped just after "real" bss, can now steal unused mem from the latter - no hardcoded VAs for other MMIO devices - tegra: remove timers, use the generic timer instead	2021-02-19 21:51:48 +00:00
TuxSH	1369697058	thermosphere: add debug pause logic	2021-02-19 21:51:47 +00:00
TuxSH	388c245ce4	thermosphere: add TransportInterface abstraction layer	2021-02-19 21:51:45 +00:00
TuxSH	8dc9be9f8e	thermosphere: pl011 uart refactor	2021-02-19 21:51:44 +00:00
TuxSH	1eb60a2a52	thermosphere: add hypervisor timer code	2021-02-19 21:51:43 +00:00
TuxSH	28552da099	thermosphere: vgic: largely reduce the number of mmio accesses ... since we have to use 64 bits for VirqState anyway	2021-02-19 21:51:41 +00:00
TuxSH	c42aef6ba7	thermosphere: fix wrong icfgr shift; fix list handling bug	2021-02-19 21:51:40 +00:00
TuxSH	7130b6efd1	thermosphere: yikes	2021-02-19 21:51:39 +00:00
TuxSH	676a895cca	thermosphere: fix guest access to irq 25, etc; we don't need to raise VI manually ... See Armv8a TRM "Virtual IRQ exception"	2021-02-19 21:51:37 +00:00
TuxSH	e3b6d64f1b	thermosphere: fix multiple bugs	2021-02-19 21:51:35 +00:00
TuxSH	c17b81aaf6	thermosphere: vgic code draft	2021-02-19 21:51:35 +00:00
TuxSH	0b69407f8e	thermosphere: barrier & active core mask	2021-02-19 21:51:33 +00:00
TuxSH	0a9a8c2f15	thermosphere: handle physical IRQs	2021-02-19 21:51:33 +00:00