mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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119 lines
No EOL
3.6 KiB
C
119 lines
No EOL
3.6 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef FUSEE_TSEC_H_
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#define FUSEE_TSEC_H_
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#include <string.h>
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#include <stdbool.h>
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#define TSEC_BASE 0x54500000
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#define SOR1_BASE 0x54580000
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#define SOR1_DP_HDCP_BKSV_LSB MAKE_REG32(SOR1_BASE + 0x1E8)
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#define SOR1_TMDS_HDCP_BKSV_LSB MAKE_REG32(SOR1_BASE + 0x21C)
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#define SOR1_TMDS_HDCP_CN_MSB MAKE_REG32(SOR1_BASE + 0x208)
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#define SOR1_TMDS_HDCP_CN_LSB MAKE_REG32(SOR1_BASE + 0x20C)
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typedef struct {
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uint8_t _0x0[0x1000]; /* Ignore non Falcon registers. */
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uint32_t FALCON_IRQSSET;
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uint32_t FALCON_IRQSCLR;
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uint32_t FALCON_IRQSTAT;
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uint32_t FALCON_IRQMODE;
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uint32_t FALCON_IRQMSET;
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uint32_t FALCON_IRQMCLR;
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uint32_t FALCON_IRQMASK;
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uint32_t FALCON_IRQDEST;
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uint8_t _0x1020[0x20];
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uint32_t FALCON_SCRATCH0;
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uint32_t FALCON_SCRATCH1;
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uint32_t FALCON_ITFEN;
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uint32_t FALCON_IDLESTATE;
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uint32_t FALCON_CURCTX;
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uint32_t FALCON_NXTCTX;
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uint8_t _0x1058[0x28];
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uint32_t FALCON_SCRATCH2;
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uint32_t FALCON_SCRATCH3;
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uint32_t FALCON_PM_SIGNAL;
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uint32_t FALCON_PM_MODE;
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uint32_t FALCON_DEBUG1;
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uint32_t FALCON_DEBUGINFO;
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uint32_t FALCON_BREAKPOINT0;
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uint32_t FALCON_BREAKPOINT1;
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uint32_t FALCON_CGCTL;
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uint32_t FALCON_ENGCTL;
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uint8_t _0x10A8[0x58];
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uint32_t FALCON_CPUCTL;
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uint32_t FALCON_BOOTVEC;
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uint32_t FALCON_HWCFG;
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uint32_t FALCON_DMACTL;
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uint32_t FALCON_DMATRFBASE;
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uint32_t FALCON_DMATRFMOFFS;
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uint32_t FALCON_DMATRFCMD;
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uint32_t FALCON_DMATRFFBOFFS;
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uint8_t _0x1120[0x10];
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uint32_t FALCON_CPUCTL_ALIAS;
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uint8_t _0x1134[0x20];
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uint32_t FALCON_IMFILLRNG1;
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uint32_t FALCON_IMFILLCTL;
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uint32_t _0x115C;
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uint32_t _0x1160;
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uint32_t _0x1164;
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uint32_t FALCON_EXTERRADDR;
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uint32_t FALCON_EXTERRSTAT;
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uint32_t _0x1170;
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uint32_t _0x1174;
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uint32_t _0x1178;
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uint32_t FALCON_CG2;
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uint32_t FALCON_CODE_INDEX;
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uint32_t FALCON_CODE;
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uint32_t FALCON_CODE_VIRT_ADDR;
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uint8_t _0x118C[0x34];
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uint32_t FALCON_DATA_INDEX0;
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uint32_t FALCON_DATA0;
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uint32_t FALCON_DATA_INDEX1;
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uint32_t FALCON_DATA1;
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uint32_t FALCON_DATA_INDEX2;
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uint32_t FALCON_DATA2;
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uint32_t FALCON_DATA_INDEX3;
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uint32_t FALCON_DATA3;
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uint32_t FALCON_DATA_INDEX4;
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uint32_t FALCON_DATA4;
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uint32_t FALCON_DATA_INDEX5;
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uint32_t FALCON_DATA5;
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uint32_t FALCON_DATA_INDEX6;
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uint32_t FALCON_DATA6;
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uint32_t FALCON_DATA_INDEX7;
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uint32_t FALCON_DATA7;
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uint32_t FALCON_ICD_CMD;
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uint32_t FALCON_ICD_ADDR;
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uint32_t FALCON_ICD_WDATA;
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uint32_t FALCON_ICD_RDATA;
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uint8_t _0x1210[0x30];
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uint32_t FALCON_SCTL;
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uint8_t _0x1244[0x1430-0x1244]; /* Ignore non Falcon registers. */
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uint32_t TSEC_SCP_INSN_STAT;
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uint8_t _0x1434[0x1244+0x5F8-0x1434]; /* Ignore non Falcon registers. */
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} tegra_tsec_t;
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static inline volatile tegra_tsec_t *tsec_get_regs(void)
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{
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return (volatile tegra_tsec_t *)TSEC_BASE;
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}
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#endif |