mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-12 23:16:40 +00:00
192 lines
4.6 KiB
C
192 lines
4.6 KiB
C
#ifndef FUSEE_PINMUX_H
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#define FUSEE_PINMUX_H
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#define PINMUX_TRISTATE (1 << 4)
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#define PINMUX_PARKED (1 << 5)
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#define PINMUX_INPUT (1 << 6)
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#define PINMUX_PULL_NONE (0 << 2)
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#define PINMUX_PULL_DOWN (1 << 2)
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#define PINMUX_PULL_UP (2 << 2)
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#define PINMUX_SELECT_FUNCTION0 0
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#define PINMUX_SELECT_FUNCTION1 1
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#define PINMUX_SELECT_FUNCTION2 2
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#define PINMUX_SELECT_FUNCTION3 3
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#define PINMUX_DRIVE_1X (0 << 13)
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#define PINMUX_DRIVE_2X (1 << 13)
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#define PINMUX_DRIVE_3X (2 << 13)
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#define PINMUX_DRIVE_4X (3 << 13)
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typedef struct {
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uint32_t sdmmc1_clk;
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uint32_t sdmmc1_cmd;
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uint32_t sdmmc1_dat3;
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uint32_t sdmmc1_dat2;
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uint32_t sdmmc1_dat1;
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uint32_t sdmmc1_dat0;
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uint32_t _r18;
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uint32_t sdmmc3_clk;
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uint32_t sdmmc3_cmd;
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uint32_t sdmmc3_dat0;
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uint32_t sdmmc3_dat1;
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uint32_t sdmmc3_dat2;
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uint32_t sdmmc3_dat3;
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uint32_t _r34;
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uint32_t pex_l0_rst_n;
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uint32_t pex_l0_clkreq_n;
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uint32_t pex_wake_n;
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uint32_t pex_l1_rst_n;
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uint32_t pex_l1_clkreq_n;
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uint32_t sata_led_active;
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uint32_t spi1_mosi;
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uint32_t spi1_miso;
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uint32_t spi1_sck;
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uint32_t spi1_cs0;
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uint32_t spi1_cs1;
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uint32_t spi2_mosi;
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uint32_t spi2_miso;
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uint32_t spi2_sck;
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uint32_t spi2_cs0;
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uint32_t spi2_cs1;
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uint32_t spi4_mosi;
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uint32_t spi4_miso;
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uint32_t spi4_sck;
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uint32_t spi4_cs0;
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uint32_t qspi_sck;
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uint32_t qspi_cs_n;
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uint32_t qspi_io0;
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uint32_t qspi_io1;
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uint32_t qspi_io2;
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uint32_t qspi_io3;
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uint32_t _ra0;
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uint32_t dmic1_clk;
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uint32_t dmic1_dat;
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uint32_t dmic2_clk;
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uint32_t dmic2_dat;
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uint32_t dmic3_clk;
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uint32_t dmic3_dat;
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uint32_t gen1_i2c_scl;
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uint32_t gen1_i2c_sda;
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uint32_t gen2_i2c_scl;
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uint32_t gen2_i2c_sda;
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uint32_t gen3_i2c_scl;
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uint32_t gen3_i2c_sda;
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uint32_t cam_i2c_scl;
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uint32_t cam_i2c_sda;
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uint32_t pwr_i2c_scl;
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uint32_t pwr_i2c_sda;
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uint32_t uart1_tx;
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uint32_t uart1_rx;
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uint32_t uart1_rts;
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uint32_t uart1_cts;
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uint32_t uart2_tx;
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uint32_t uart2_rx;
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uint32_t uart2_rts;
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uint32_t uart2_cts;
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uint32_t uart3_tx;
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uint32_t uart3_rx;
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uint32_t uart3_rts;
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uint32_t uart3_cts;
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uint32_t uart4_tx;
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uint32_t uart4_rx;
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uint32_t uart4_rts;
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uint32_t uart4_cts;
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uint32_t dap1_fs;
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uint32_t dap1_din;
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uint32_t dap1_dout;
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uint32_t dap1_sclk;
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uint32_t dap2_fs;
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uint32_t dap2_din;
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uint32_t dap2_dout;
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uint32_t dap2_sclk;
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uint32_t dap4_fs;
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uint32_t dap4_din;
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uint32_t dap4_dout;
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uint32_t dap4_sclk;
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uint32_t cam1_mclk;
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uint32_t cam2_mclk;
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uint32_t jtag_rtck;
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uint32_t clk_32k_in;
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uint32_t clk_32k_out;
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uint32_t batt_bcl;
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uint32_t clk_req;
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uint32_t cpu_pwr_req;
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uint32_t pwr_int_n;
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uint32_t shutdown;
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uint32_t core_pwr_req;
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uint32_t aud_mclk;
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uint32_t dvfs_pwm;
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uint32_t dvfs_clk;
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uint32_t gpio_x1_aud;
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uint32_t gpio_x3_aud;
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uint32_t pcc7;
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uint32_t hdmi_cec;
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uint32_t hdmi_int_dp_hpd;
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uint32_t spdif_out;
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uint32_t spdif_in;
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uint32_t usb_vbus_en0;
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uint32_t usb_vbus_en1;
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uint32_t dp_hpd0;
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uint32_t wifi_en;
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uint32_t wifi_rst;
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uint32_t wifi_wake_ap;
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uint32_t ap_wake_bt;
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uint32_t bt_rst;
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uint32_t bt_wake_ap;
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uint32_t ap_wake_nfc;
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uint32_t nfc_en;
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uint32_t nfc_int;
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uint32_t gps_en;
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uint32_t gps_rst;
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uint32_t cam_rst;
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uint32_t cam_af_en;
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uint32_t cam_flash_en;
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uint32_t cam1_pwdn;
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uint32_t cam2_pwdn;
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uint32_t cam1_strobe;
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uint32_t lcd_te;
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uint32_t lcd_bl_pwm;
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uint32_t lcd_bl_en;
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uint32_t lcd_rst;
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uint32_t lcd_gpio1;
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uint32_t lcd_gpio2;
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uint32_t ap_ready;
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uint32_t touch_rst;
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uint32_t touch_clk;
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uint32_t modem_wake_ap;
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uint32_t touch_int;
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uint32_t motion_int;
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uint32_t als_prox_int;
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uint32_t temp_alert;
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uint32_t button_power_on;
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uint32_t button_vol_up;
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uint32_t button_vol_down;
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uint32_t button_slide_sw;
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uint32_t button_home;
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uint32_t pa6;
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uint32_t pe6;
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uint32_t pe7;
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uint32_t ph6;
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uint32_t pk0;
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uint32_t pk1;
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uint32_t pk2;
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uint32_t pk3;
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uint32_t pk4;
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uint32_t pk5;
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uint32_t pk6;
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uint32_t pk7;
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uint32_t pl0;
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uint32_t pl1;
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uint32_t pz0;
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uint32_t pz1;
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uint32_t pz2;
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uint32_t pz3;
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uint32_t pz4;
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uint32_t pz5;
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} tegra_pinmux_t;
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static inline volatile tegra_pinmux_t *pinmux_get_regs(void)
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{
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return (volatile tegra_pinmux_t *)0x70003000;
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}
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#endif
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