mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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178 lines
6.2 KiB
C
178 lines
6.2 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "max7762x.h"
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#include "max77620.h"
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#include "i2c.h"
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#include "timers.h"
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#define REGULATOR_SD 0
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#define REGULATOR_LDO 1
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typedef struct _max77620_regulator_t
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{
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uint8_t type;
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const char *name;
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uint8_t reg_sd;
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uint32_t mv_step;
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uint32_t mv_min;
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uint32_t mv_default;
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uint32_t mv_max;
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uint8_t volt_addr;
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uint8_t cfg_addr;
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uint8_t volt_mask;
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uint8_t enable_mask;
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uint8_t enable_shift;
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uint8_t status_mask;
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uint8_t fps_addr;
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uint8_t fps_src;
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uint8_t pd_period;
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uint8_t pu_period;
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} max77620_regulator_t;
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static const max77620_regulator_t _pmic_regulators[] = {
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{ REGULATOR_SD, "sd0", 0x16, 12500, 600000, 625000, 1400000, MAX77620_REG_SD0, MAX77620_REG_SD0_CFG, 0x3F, 0x30, 4, 0x80, 0x4F, 1, 7, 1 },
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{ REGULATOR_SD, "sd1", 0x17, 12500, 600000, 1125000, 1125000, MAX77620_REG_SD1, MAX77620_REG_SD1_CFG, 0x3F, 0x30, 4, 0x40, 0x50, 0, 1, 5 },
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{ REGULATOR_SD, "sd2", 0x18, 12500, 600000, 1325000, 1350000, MAX77620_REG_SD2, MAX77620_REG_SD2_CFG, 0xFF, 0x30, 4, 0x20, 0x51, 1, 5, 2 },
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{ REGULATOR_SD, "sd3", 0x19, 12500, 600000, 1800000, 1800000, MAX77620_REG_SD3, MAX77620_REG_SD3_CFG, 0xFF, 0x30, 4, 0x10, 0x52, 0, 3, 3 },
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{ REGULATOR_LDO, "ldo0", 0x00, 25000, 800000, 1200000, 1200000, MAX77620_REG_LDO0_CFG, MAX77620_REG_LDO0_CFG2, 0x3F, 0xC0, 6, 0x00, 0x46, 3, 7, 0 },
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{ REGULATOR_LDO, "ldo1", 0x00, 25000, 800000, 1050000, 1050000, MAX77620_REG_LDO1_CFG, MAX77620_REG_LDO1_CFG2, 0x3F, 0xC0, 6, 0x00, 0x47, 3, 7, 0 },
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{ REGULATOR_LDO, "ldo2", 0x00, 50000, 800000, 1800000, 3300000, MAX77620_REG_LDO2_CFG, MAX77620_REG_LDO2_CFG2, 0x3F, 0xC0, 6, 0x00, 0x48, 3, 7, 0 },
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{ REGULATOR_LDO, "ldo3", 0x00, 50000, 800000, 3100000, 3100000, MAX77620_REG_LDO3_CFG, MAX77620_REG_LDO3_CFG2, 0x3F, 0xC0, 6, 0x00, 0x49, 3, 7, 0 },
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{ REGULATOR_LDO, "ldo4", 0x00, 12500, 800000, 850000, 850000, MAX77620_REG_LDO4_CFG, MAX77620_REG_LDO4_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4A, 0, 7, 1 },
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{ REGULATOR_LDO, "ldo5", 0x00, 50000, 800000, 1800000, 1800000, MAX77620_REG_LDO5_CFG, MAX77620_REG_LDO5_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4B, 3, 7, 0 },
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{ REGULATOR_LDO, "ldo6", 0x00, 50000, 800000, 2900000, 2900000, MAX77620_REG_LDO6_CFG, MAX77620_REG_LDO6_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4C, 3, 7, 0 },
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{ REGULATOR_LDO, "ldo7", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO7_CFG, MAX77620_REG_LDO7_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4D, 1, 4, 3 },
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{ REGULATOR_LDO, "ldo8", 0x00, 50000, 800000, 1050000, 1050000, MAX77620_REG_LDO8_CFG, MAX77620_REG_LDO8_CFG2, 0x3F, 0xC0, 6, 0x00, 0x4E, 3, 7, 0 }
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};
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int max77620_regulator_get_status(uint32_t id)
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{
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if (id > REGULATOR_MAX)
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return 0;
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const max77620_regulator_t *reg = &_pmic_regulators[id];
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uint8_t val = 0;
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if (reg->type == REGULATOR_SD) {
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if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_STATSD, &val, 1))
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return (val & reg->status_mask) ? 0 : 1;
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}
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if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, reg->cfg_addr, &val, 1))
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return (val & 8) ? 1 : 0;
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return 0;
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}
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int max77620_regulator_config_fps(uint32_t id)
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{
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if (id > REGULATOR_MAX)
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return 0;
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const max77620_regulator_t *reg = &_pmic_regulators[id];
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uint8_t val = ((reg->fps_src << 6) | (reg->pu_period << 3) | (reg->pd_period));
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if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, reg->fps_addr, &val, 1)) {
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return 1;
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}
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return 0;
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}
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int max77620_regulator_set_voltage(uint32_t id, uint32_t mv)
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{
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if (id > REGULATOR_MAX)
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return 0;
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const max77620_regulator_t *reg = &_pmic_regulators[id];
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if ((mv < reg->mv_default) || (mv > reg->mv_max))
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return 0;
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uint32_t mult = (mv + reg->mv_step - 1 - reg->mv_min) / reg->mv_step;
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uint8_t val = 0;
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if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, reg->volt_addr, &val, 1))
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{
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val = ((val & ~reg->volt_mask) | (mult & reg->volt_mask));
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if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, reg->volt_addr, &val, 1))
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{
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udelay(1000);
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return 1;
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}
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}
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return 0;
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}
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int max77620_regulator_enable(uint32_t id, int enable)
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{
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if (id > REGULATOR_MAX)
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return 0;
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const max77620_regulator_t *reg = &_pmic_regulators[id];
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uint32_t addr = (reg->type == REGULATOR_SD) ? reg->cfg_addr : reg->volt_addr;
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uint8_t val = 0;
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if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, addr, &val, 1))
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{
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if (enable)
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val = ((val & ~reg->enable_mask) | ((3 << reg->enable_shift) & reg->enable_mask));
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else
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val &= ~reg->enable_mask;
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if (i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, addr, &val, 1))
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{
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udelay(1000);
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return 1;
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}
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}
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return 0;
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}
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void max77620_config_default()
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{
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for (uint32_t i = 1; i <= REGULATOR_MAX; i++)
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{
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uint8_t val = 0;
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if (i2c_query(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CID4, &val, 1))
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{
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max77620_regulator_config_fps(i);
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max77620_regulator_set_voltage(i, _pmic_regulators[i].mv_default);
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if (_pmic_regulators[i].fps_src != MAX77620_FPS_SRC_NONE) {
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max77620_regulator_enable(i, 1);
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}
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}
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}
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uint8_t val = 4;
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i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_SD_CFG2, &val, 1);
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}
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void max77620_low_battery_monitor_config()
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{
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uint8_t val = (MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_LBHYST_N | MAX77620_CNFGGLBL1_LBDAC_N);
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i2c_send(I2C_5, MAX77620_PWR_I2C_ADDR, MAX77620_REG_CNFGGLBL1, &val, 1);
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}
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