mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-27 14:22:17 +00:00
f66b41c027
exo2: Implement uncompressor stub and boot code up to Main(). exo2: implement some more init (uart/gic) exo2: implement more of init exo2: improve reg api, add keyslot flag setters exo2: implement se aes decryption/enc exo2: fix bugs in loader stub/mmu mappings exo2: start skeletoning bootconfig/global context types arch: fix makefile flags exo2: implement through master key derivation exo2: implement device master keygen exo2: more init through start of SetupSocSecurity exo2: implement pmc secure scratch management se: implement sticky bit validation libexosphere: fix building for arm32 libexo: fix makefile flags libexo: support building for arm64/arm sc7fw: skeleton binary sc7fw: skeleton a little more sc7fw: implement all non-dram functionality exo2: fix DivideUp error sc7fw: implement more dram code, fix reg library errors sc7fw: complete sc7fw impl. exo2: skeleton the rest of SetupSocSecurity exo2: implement fiq interrupt handler exo2: implement all exception handlers exo2: skeleton the entire smc api, implement the svc invoker exo2: implement rest of SetupSocSecurity exo2: correct slave security errors exo2: fix register definition exo2: minor fixes
69 lines
2 KiB
C++
69 lines
2 KiB
C++
/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <vapours.hpp>
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#include <exosphere/hw/hw_arm64_system_registers.hpp>
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#include <exosphere/hw/hw_arm64_cache.hpp>
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namespace ams::hw::arch::arm64 {
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ALWAYS_INLINE void DataSynchronizationBarrier() {
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__asm__ __volatile__("dsb sy" ::: "memory");
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}
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ALWAYS_INLINE void DataSynchronizationBarrierInnerShareable() {
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__asm__ __volatile__("dsb ish" ::: "memory");
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}
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ALWAYS_INLINE void DataMemoryBarrier() {
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__asm__ __volatile__("dmb sy" ::: "memory");
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}
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ALWAYS_INLINE void InstructionSynchronizationBarrier() {
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__asm__ __volatile__("isb" ::: "memory");
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}
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ALWAYS_INLINE void WaitForInterrupt() {
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__asm__ __volatile__("wfi" ::: "memory");
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}
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ALWAYS_INLINE void WaitForEvent() {
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__asm__ __volatile__("wfe" ::: "memory");
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}
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ALWAYS_INLINE void SendEvent() {
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__asm__ __volatile__("sev" ::: "memory");
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}
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ALWAYS_INLINE int CountLeadingZeros(u64 v) {
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u64 z;
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__asm__ __volatile__("clz %[z], %[v]" : [z]"=r"(z) : [v]"r"(v));
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return z;
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}
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ALWAYS_INLINE int CountLeadingZeros(u32 v) {
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u32 z;
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__asm__ __volatile__("clz %w[z], %w[v]" : [z]"=r"(z) : [v]"r"(v));
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return z;
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}
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ALWAYS_INLINE int GetCurrentCoreId() {
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u64 mpidr;
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HW_CPU_GET_MPIDR_EL1(mpidr);
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return mpidr & 0xFF;
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}
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}
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