mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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110 lines
4.1 KiB
C++
110 lines
4.1 KiB
C++
/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "boot_pmc_wrapper.hpp"
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#include "boot_wake_pins.hpp"
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#include "boot_registers_pmc.hpp"
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namespace ams::boot {
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/* Include configuration into anonymous namespace. */
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namespace {
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struct WakePinConfig {
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u32 index;
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bool enabled;
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u32 level;
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};
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#include "boot_wake_control_configs.inc"
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#include "boot_wake_pin_configuration.inc"
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#include "boot_wake_pin_configuration_copper.inc"
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}
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namespace {
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/* Helpers. */
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void UpdatePmcControlBit(const u32 reg_offset, const u32 mask_val, const bool flag) {
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WritePmcRegister(PmcBase + reg_offset, flag ? UINT32_MAX : 0, mask_val);
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ReadPmcRegister(PmcBase + reg_offset);
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}
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void InitializePmcWakeConfiguration(const bool is_blink) {
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/* Initialize APBDEV_PMC_WAKE_DEBOUNCE_EN, do a dummy read. */
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WritePmcRegister(PmcBase + APBDEV_PMC_WAKE_DEBOUNCE_EN, 0);
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ReadPmcRegister(PmcBase + APBDEV_PMC_WAKE_DEBOUNCE_EN);
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/* Initialize APBDEV_PMC_BLINK_TIMER, do a dummy read. */
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WritePmcRegister(PmcBase + APBDEV_PMC_BLINK_TIMER, 0x8008800);
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ReadPmcRegister(PmcBase + APBDEV_PMC_BLINK_TIMER);
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/* Set control bits, do dummy reads. */
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for (size_t i = 0; i < NumWakeControlConfigs; i++) {
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UpdatePmcControlBit(WakeControlConfigs[i].reg_offset, WakeControlConfigs[i].mask_val, WakeControlConfigs[i].flag_val);
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}
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/* Set bit 0x80 in APBDEV_PMC_CNTRL based on is_blink, do dummy read. */
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UpdatePmcControlBit(APBDEV_PMC_CNTRL, 0x80, is_blink);
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/* Set bit 0x100000 in APBDEV_PMC_DPD_PADS_ORIDE based on is_blink, do dummy read. */
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UpdatePmcControlBit(APBDEV_PMC_DPD_PADS_ORIDE, 0x100000, is_blink);
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}
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void SetWakeEventLevel(u32 index, u32 level) {
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u32 pmc_wake_level_reg_offset = index <= 0x1F ? APBDEV_PMC_WAKE_LVL : APBDEV_PMC_WAKE2_LVL;
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u32 pmc_wake_level_mask_reg_offset = index <= 0x1F ? APBDEV_PMC_AUTO_WAKE_LVL_MASK : APBDEV_PMC_AUTO_WAKE2_LVL_MASK;
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if (level != 2) {
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std::swap(pmc_wake_level_reg_offset, pmc_wake_level_mask_reg_offset);
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}
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const u32 mask_val = (1 << (index & 0x1F));
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/* Clear level reg bit. */
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UpdatePmcControlBit(pmc_wake_level_reg_offset, mask_val, false);
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/* Set or clear mask reg bit. */
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UpdatePmcControlBit(pmc_wake_level_mask_reg_offset, mask_val, level > 0);
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}
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void SetWakeEventEnabled(u32 index, bool enabled) {
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/* Set or clear enabled bit. */
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UpdatePmcControlBit(index <= 0x1F ? APBDEV_PMC_WAKE_MASK : APBDEV_PMC_WAKE2_MASK, (1 << (index & 0x1F)), enabled);
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}
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}
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void SetInitialWakePinConfiguration() {
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InitializePmcWakeConfiguration(false);
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/* Set wake event levels, wake event enables. */
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const WakePinConfig *configs;
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size_t num_configs;
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if (spl::GetHardwareType() == spl::HardwareType::Copper) {
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configs = WakePinConfigsCopper;
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num_configs = NumWakePinConfigsCopper;
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} else {
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configs = WakePinConfigs;
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num_configs = NumWakePinConfigs;
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}
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for (size_t i = 0; i < num_configs; i++) {
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SetWakeEventLevel(configs[i].index, configs[i].level);
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SetWakeEventEnabled(configs[i].index, configs[i].enabled);
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}
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}
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}
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