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148 lines
4.1 KiB
ArmAsm
148 lines
4.1 KiB
ArmAsm
.macro ERRATUM_INVALIDATE_BTB_AT_BOOT
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/* Nintendo copy-pasted https://github.com/ARM-software/arm-trusted-firmware/blob/master/plat/nvidia/tegra/common/aarch64/tegra_helpers.S#L312 */
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/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/* The following comments are mine. */
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/* mask all interrupts */
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msr daifset, 0b1111
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/*
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Enable invalidates of branch target buffer, then flush
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the entire instruction cache at the local level, and
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with the reg change, the branch target buffer, then disable
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invalidates of the branch target buffer again.
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*/
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mrs x0, cpuactlr_el1
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orr x0, x0, #1
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msr cpuactlr_el1, x0
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dsb sy
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isb
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ic iallu
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dsb sy
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isb
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mrs x0, cpuactlr_el1
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bic x0, x0, #1
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msr cpuactlr_el1, x0
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.rept 7
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nop /* wait long enough for the write to cpuactlr_el1 to have completed */
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.endr
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/* if the OS lock is set, disable it and request a warm reset */
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mrs x0, oslsr_el1
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ands x0, x0, #2
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b.eq _set_lock_and_sp
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mov x0, xzr
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msr oslar_el1, x0
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mov x0, #(1 << 63)
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msr cpuactlr_el1, x0 /* disable regional clock gating */
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isb
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mov x0, #3
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msr rmr_el3, x0
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isb
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dsb sy
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/* Nintendo forgot to copy-paste the branch instruction below. */
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_reset_wfi:
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wfi
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b _reset_wfi
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.rept 65
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nop /* guard against speculative excecution */
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.endr
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_set_lock_and_sp:
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/* set the OS lock */
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mov x0, #1
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msr oslar_el1, x0
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.endm
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.align 6
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.section .text.cold.start, "ax", %progbits
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.global __start_cold
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__start_cold:
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ERRATUM_INVALIDATE_BTB_AT_BOOT
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msr spsel, #0
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bl get_coldboot_crt0_stack_address /* should be optimized so it doesn't make function calls */
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mov sp, x0
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bl coldboot_init
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ldr x16, =__jump_to_main_cold
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br x16
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.align 6
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.section .text.warm.start, "ax", %progbits
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.global __start_warm
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__start_warm:
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ERRATUM_INVALIDATE_BTB_AT_BOOT
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/* For some reasons, Nintendo uses spsel, #1 here, causing issues if an exception occurs */
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msr spsel, #0
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bl get_warmboot_crt0_stack_address /* should be optimized so it doesn't make function calls */
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mov sp, x0
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bl warmboot_init
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ldr x16, =__jump_to_main_warm
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br x16
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.section .text.__jump_to_main_cold, "ax", %progbits
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__jump_to_main_cold:
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bl __set_exception_entry_stack_pointer
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bl get_pk2ldr_stack_address
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mov sp, x0
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bl load_package2
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mov w0, #3 /* use core3 stack temporarily */
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bl get_exception_entry_stack_address
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mov sp, x0
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b coldboot_main
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.section .text.__jump_to_main_warm, "ax", %progbits
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__jump_to_main_warm:
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/* Nintendo doesn't do that here, causing issues if an exception occurs */
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bl __set_exception_entry_stack_pointer
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bl get_pk2ldr_stack_address
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mov sp, x0
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bl load_package2
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mov w0, #3 /* use core0,1,2 stack bottom + 0x800 (VA of warmboot crt0 sp) temporarily */
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bl get_exception_entry_stack_address
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add sp, x0, #0x800
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b warmboot_main
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.section .text.__set_exception_entry_stack, "ax", %progbits
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.type __set_exception_entry_stack, %function
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.global __set_exception_entry_stack
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__set_exception_entry_stack_pointer:
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/* If SPSel == 1 on entry, make sure your function doesn't use stack variables! */
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mov x16, lr
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mrs x17, spsel
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msr x0, mpidr_el1
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and w0, w0, #3
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bl get_exception_entry_stack_address /* should be optimized so it doesn't make function calls */
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msr spsel, #1
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mov sp, x0
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msr spsel, x17
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mov lr, x16
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ret
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.section .text.__jump_to_lower_el, "ax", %progbits
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.global __jump_to_lower_el
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.type __jump_to_lower_el, %function
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__jump_to_lower_el:
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/* x0: arg (context ID), x1: entrypoint, w2: exception level */
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msr elr_el3, x1
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mov x1, #((0b1111 << 6) | 1) /* DAIF set and SP = SP_ELx*/
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orr x1, w2, lsl#2
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msr spsr_el3, x1
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bl __set_exception_entry_stack_pointer
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isb
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eret
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