mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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142 lines
4.5 KiB
C++
142 lines
4.5 KiB
C++
/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <exosphere.hpp>
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#include "secmon_cpu_context.hpp"
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#include "secmon_error.hpp"
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namespace ams::secmon {
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namespace {
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struct DebugRegisters {
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u32 osdttrx_el1;
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u32 osdtrtx_el1;
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u32 mdscr_el1;
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u32 oseccr_el1;
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u32 mdccint_el1;
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u32 dbgclaimclr_el1;
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u32 dbgvcr32_el2;
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u32 sder32_el3;
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u32 mdcr_el2;
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u32 mdcr_el3;
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u32 spsr_el3;
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};
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struct CoreContext {
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EntryContext entry_context;
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bool is_on;
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bool is_reset_expected;
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bool is_debug_registers_saved;
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DebugRegisters debug_registers;
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};
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void SaveDebugRegisters(DebugRegisters &dr) {
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/* Set the OS lock; this will be unlocked by entry code. */
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HW_CPU_SET_OSLAR_EL1(1);
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/* Save general debug registers. */
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HW_CPU_GET_OSDTRRX_EL1 (dr.osdttrx_el1);
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HW_CPU_GET_OSDTRTX_EL1 (dr.osdtrtx_el1);
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HW_CPU_GET_MDSCR_EL1 (dr.mdscr_el1);
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HW_CPU_GET_OSECCR_EL1 (dr.oseccr_el1);
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HW_CPU_GET_MDCCINT_EL1 (dr.mdccint_el1);
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HW_CPU_GET_DBGCLAIMCLR_EL1(dr.dbgclaimclr_el1);
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HW_CPU_GET_DBGVCR32_EL2 (dr.dbgvcr32_el2);
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HW_CPU_GET_SDER32_EL3 (dr.sder32_el3);
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HW_CPU_GET_MDCR_EL2 (dr.mdcr_el2);
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HW_CPU_GET_MDCR_EL3 (dr.mdcr_el3);
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HW_CPU_GET_SPSR_EL3 (dr.spsr_el3);
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}
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void RestoreDebugRegisters(const DebugRegisters &dr) {
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/* Restore general debug registers. */
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HW_CPU_SET_OSDTRRX_EL1 (dr.osdttrx_el1);
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HW_CPU_SET_OSDTRTX_EL1 (dr.osdtrtx_el1);
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HW_CPU_SET_MDSCR_EL1 (dr.mdscr_el1);
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HW_CPU_SET_OSECCR_EL1 (dr.oseccr_el1);
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HW_CPU_SET_MDCCINT_EL1 (dr.mdccint_el1);
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HW_CPU_SET_DBGCLAIMCLR_EL1(dr.dbgclaimclr_el1);
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HW_CPU_SET_DBGVCR32_EL2 (dr.dbgvcr32_el2);
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HW_CPU_SET_SDER32_EL3 (dr.sder32_el3);
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HW_CPU_SET_MDCR_EL2 (dr.mdcr_el2);
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HW_CPU_SET_MDCR_EL3 (dr.mdcr_el3);
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HW_CPU_SET_SPSR_EL3 (dr.spsr_el3);
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}
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constinit CoreContext g_core_contexts[NumCores] = {};
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}
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bool IsCoreOn(int core) {
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return g_core_contexts[core].is_on;
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}
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void SetCoreOff() {
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g_core_contexts[hw::GetCurrentCoreId()].is_on = false;
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}
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bool IsResetExpected() {
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return g_core_contexts[hw::GetCurrentCoreId()].is_reset_expected;
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}
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void SetResetExpected(int core, bool expected) {
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g_core_contexts[core].is_reset_expected = expected;
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}
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void SetResetExpected(bool expected) {
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SetResetExpected(hw::GetCurrentCoreId(), expected);
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}
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void SetEntryContext(int core, uintptr_t address, uintptr_t arg) {
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g_core_contexts[core].entry_context.pc = address;
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g_core_contexts[core].entry_context.x0 = arg;
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}
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void GetEntryContext(EntryContext *out) {
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auto &ctx = g_core_contexts[hw::GetCurrentCoreId()];
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const auto pc = ctx.entry_context.pc;
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const auto x0 = ctx.entry_context.x0;
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if (pc == 0 || ctx.is_on) {
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SetError(pkg1::ErrorInfo_InvalidCoreContext);
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AMS_ABORT("Invalid core context");
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}
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ctx.entry_context = {};
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ctx.is_on = true;
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out->pc = pc;
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out->x0 = x0;
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}
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void SaveDebugRegisters() {
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auto &ctx = g_core_contexts[hw::GetCurrentCoreId()];
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SaveDebugRegisters(ctx.debug_registers);
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ctx.is_debug_registers_saved = true;
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}
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void RestoreDebugRegisters() {
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auto &ctx = g_core_contexts[hw::GetCurrentCoreId()];
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if (ctx.is_debug_registers_saved) {
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RestoreDebugRegisters(ctx.debug_registers);
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ctx.is_debug_registers_saved = false;
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}
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}
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}
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