mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-18 18:06:40 +00:00
487 lines
No EOL
16 KiB
C++
487 lines
No EOL
16 KiB
C++
/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "boot_functions.hpp"
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#include "boot_pinmux_map.hpp"
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static bool g_initialized_pinmux_vaddr = false;
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static uintptr_t g_pinmux_vaddr = 0;
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static inline const PinmuxDefinition *GetPinmuxDefinition(u32 pinmux_name) {
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if (pinmux_name >= PinmuxPadNameMax) {
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std::abort();
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}
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return &PinmuxMap[pinmux_name];
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}
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static inline const PinmuxDrivePadDefinition *GetPinmuxDrivePadDefinition(u32 pinmux_name) {
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if (pinmux_name >= PinmuxDrivePadNameMax) {
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std::abort();
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}
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return &PinmuxDrivePadMap[pinmux_name];
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}
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static uintptr_t GetPinmuxBaseAddress() {
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if (!g_initialized_pinmux_vaddr) {
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u64 vaddr;
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if (R_FAILED(svcQueryIoMapping(&vaddr, Boot::ApbMiscPhysicalBase, 0x4000))) {
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std::abort();
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}
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g_pinmux_vaddr = vaddr;
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g_initialized_pinmux_vaddr = true;
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}
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return g_pinmux_vaddr;
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}
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u32 Boot::PinmuxUpdatePark(u32 pinmux_name) {
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const uintptr_t pinmux_base_vaddr = GetPinmuxBaseAddress();
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const PinmuxDefinition *pinmux_def = GetPinmuxDefinition(pinmux_name);
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/* Fetch this PINMUX's register offset */
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u32 pinmux_reg_offset = pinmux_def->reg_offset;
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/* Fetch this PINMUX's mask value */
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u32 pinmux_mask_val = pinmux_def->mask_val;
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/* Get current register ptr. */
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volatile u32 *pinmux_reg = reinterpret_cast<volatile u32 *>(pinmux_base_vaddr + pinmux_reg_offset);
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/* Read from the PINMUX register */
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u32 pinmux_val = *pinmux_reg;
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/* This PINMUX supports park change */
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if (pinmux_mask_val & 0x20) {
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/* Clear park status if set */
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if (pinmux_val & 0x20) {
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pinmux_val &= ~(0x20);
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}
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}
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/* Write to the appropriate PINMUX register */
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*pinmux_reg = pinmux_val;
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/* Do a dummy read from the PINMUX register */
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pinmux_val = *pinmux_reg;
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return pinmux_val;
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}
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u32 Boot::PinmuxUpdatePad(u32 pinmux_name, u32 pinmux_config_val, u32 pinmux_config_mask_val) {
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const uintptr_t pinmux_base_vaddr = GetPinmuxBaseAddress();
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const PinmuxDefinition *pinmux_def = GetPinmuxDefinition(pinmux_name);
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/* Fetch this PINMUX's register offset */
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u32 pinmux_reg_offset = pinmux_def->reg_offset;
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/* Fetch this PINMUX's mask value */
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u32 pinmux_mask_val = pinmux_def->mask_val;
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/* Get current register ptr. */
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volatile u32 *pinmux_reg = reinterpret_cast<volatile u32 *>(pinmux_base_vaddr + pinmux_reg_offset);
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/* Read from the PINMUX register */
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u32 pinmux_val = *pinmux_reg;
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/* This PINMUX register is locked */
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if (pinmux_val & 0x80)
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return pinmux_val;
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u32 pm_config_val = (pinmux_config_val & 0x07);
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u32 pm_val = pm_config_val;
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/* Adjust PM */
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if (pinmux_config_mask_val & 0x07) {
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/* Default to safe value */
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if (pm_config_val >= 0x06)
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pm_val = 0x04;
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/* Apply additional changes first */
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if (pm_config_val == 0x05) {
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/* This pin supports PUPD change */
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if (pinmux_mask_val & 0x0C) {
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/* Change PUPD */
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if ((pinmux_val & 0x0C) != 0x04) {
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pinmux_val &= 0xFFFFFFF3;
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pinmux_val |= 0x04;
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}
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}
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/* This pin supports Tristate change */
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if (pinmux_mask_val & 0x10) {
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/* Change Tristate */
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if (!(pinmux_val & 0x10)) {
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pinmux_val |= 0x10;
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}
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}
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/* This pin supports EInput change */
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if (pinmux_mask_val & 0x40) {
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/* Change EInput */
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if (pinmux_val & 0x40) {
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pinmux_val &= 0xFFFFFFBF;
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}
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}
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/* Default to safe value */
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pm_val = 0x04;
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}
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/* Translate PM value if necessary */
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if ((pm_val & 0xFF) == 0x04)
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pm_val = pinmux_def->pm_val;
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/* This pin supports PM change */
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if (pinmux_mask_val & 0x03) {
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/* Change PM */
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if ((pinmux_val & 0x03) != (pm_val & 0x03)) {
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pinmux_val &= 0xFFFFFFFC;
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pinmux_val |= (pm_val & 0x03);
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}
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}
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}
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u32 pupd_config_val = (pinmux_config_val & 0x18);
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/* Adjust PUPD */
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if (pinmux_config_mask_val & 0x18) {
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if (pupd_config_val < 0x11) {
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/* This pin supports PUPD change */
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if (pinmux_mask_val & 0x0C) {
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/* Change PUPD */
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if ((pinmux_val & 0x0C) != (pupd_config_val >> 0x03)) {
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pinmux_val &= 0xFFFFFFF3;
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pinmux_val |= (pupd_config_val >> 0x01);
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}
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}
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}
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}
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u32 eod_config_val = (pinmux_config_val & 0x60);
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/* Adjust EOd field */
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if (pinmux_config_mask_val & 0x60) {
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if (eod_config_val == 0x20) {
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/* This pin supports Tristate change */
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if (pinmux_mask_val & 0x10) {
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/* Change Tristate */
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if (!(pinmux_val & 0x10)) {
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pinmux_val |= 0x10;
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}
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}
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/* This pin supports EInput change */
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if (pinmux_mask_val & 0x40) {
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/* Change EInput */
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if (!(pinmux_val & 0x40)) {
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pinmux_val |= 0x40;
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}
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}
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/* This pin supports EOd change */
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if (pinmux_mask_val & 0x800) {
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/* Change EOd */
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if (pinmux_val & 0x800) {
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pinmux_val &= 0xFFFFF7FF;
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}
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}
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} else if (eod_config_val == 0x40) {
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/* This pin supports Tristate change */
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if (pinmux_mask_val & 0x10) {
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/* Change Tristate */
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if (pinmux_val & 0x10) {
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pinmux_val &= 0xFFFFFFEF;
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}
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}
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/* This pin supports EInput change */
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if (pinmux_mask_val & 0x40) {
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/* Change EInput */
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if (!(pinmux_val & 0x40)) {
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pinmux_val |= 0x40;
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}
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}
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/* This pin supports EOd change */
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if (pinmux_mask_val & 0x800) {
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/* Change EOd */
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if (pinmux_val & 0x800) {
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pinmux_val &= 0xFFFFF7FF;
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}
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}
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} else if (eod_config_val == 0x60) {
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/* This pin supports Tristate change */
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if (pinmux_mask_val & 0x10) {
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/* Change Tristate */
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if (pinmux_val & 0x10) {
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pinmux_val &= 0xFFFFFFEF;
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}
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}
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/* This pin supports EInput change */
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if (pinmux_mask_val & 0x40) {
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/* Change EInput */
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if (!(pinmux_val & 0x40)) {
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pinmux_val |= 0x40;
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}
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}
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/* This pin supports EOd change */
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if (pinmux_mask_val & 0x800) {
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/* Change EOd */
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if (!(pinmux_val & 0x800)) {
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pinmux_val |= 0x800;
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}
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}
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} else {
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/* This pin supports Tristate change */
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if (pinmux_mask_val & 0x10) {
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/* Change Tristate */
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if (pinmux_val & 0x10) {
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pinmux_val &= 0xFFFFFFEF;
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}
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}
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/* This pin supports EInput change */
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if (pinmux_mask_val & 0x40) {
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/* Change EInput */
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if (pinmux_val & 0x40) {
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pinmux_val &= 0xFFFFFFBF;
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}
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}
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/* This pin supports EOd change */
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if (pinmux_mask_val & 0x800) {
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/* Change EOd */
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if (pinmux_val & 0x800) {
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pinmux_val &= 0xFFFFF7FF;
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}
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}
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}
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}
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u32 lock_config_val = (pinmux_config_val & 0x80);
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/* Adjust Lock */
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if (pinmux_config_mask_val & 0x80) {
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/* This pin supports Lock change */
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if (pinmux_mask_val & 0x80) {
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/* Change Lock */
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if ((pinmux_val ^ pinmux_config_val) & 0x80) {
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pinmux_val &= 0xFFFFFF7F;
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pinmux_val |= lock_config_val;
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}
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}
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}
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u32 ioreset_config_val = ((pinmux_config_val >> 0x08) & 0x10000);
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/* Adjust IoReset */
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if (pinmux_config_mask_val & 0x100) {
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/* This pin supports IoReset change */
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if (pinmux_mask_val & 0x10000) {
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/* Change IoReset */
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if (((pinmux_val >> 0x10) ^ (pinmux_config_val >> 0x08)) & 0x01) {
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pinmux_val |= ioreset_config_val;
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}
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}
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}
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u32 park_config_val = ((pinmux_config_val >> 0x0A) & 0x20);
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/* Adjust Park */
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if (pinmux_config_mask_val & 0x400) {
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/* This pin supports Park change */
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if (pinmux_mask_val & 0x20) {
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/* Change Park */
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if (((pinmux_val >> 0x05) ^ (pinmux_config_val >> 0x0A)) & 0x01) {
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pinmux_val |= park_config_val;
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}
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}
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}
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u32 elpdr_config_val = ((pinmux_config_val >> 0x0B) & 0x100);
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/* Adjust ELpdr */
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if (pinmux_config_mask_val & 0x800) {
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/* This pin supports ELpdr change */
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if (pinmux_mask_val & 0x100) {
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/* Change ELpdr */
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if (((pinmux_val >> 0x08) ^ (pinmux_config_val >> 0x0B)) & 0x01) {
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pinmux_val |= elpdr_config_val;
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}
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}
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}
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u32 ehsm_config_val = ((pinmux_config_val >> 0x0C) & 0x200);
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/* Adjust EHsm */
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if (pinmux_config_mask_val & 0x1000) {
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/* This pin supports EHsm change */
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if (pinmux_mask_val & 0x200) {
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/* Change EHsm */
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if (((pinmux_val >> 0x09) ^ (pinmux_config_val >> 0x0C)) & 0x01) {
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pinmux_val |= ehsm_config_val;
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}
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}
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}
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u32 eiohv_config_val = ((pinmux_config_val >> 0x09) & 0x400);
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/* Adjust EIoHv */
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if (pinmux_config_mask_val & 0x200) {
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/* This pin supports EIoHv change */
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if (pinmux_mask_val & 0x400) {
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/* Change EIoHv */
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if (((pinmux_val >> 0x0A) ^ (pinmux_config_val >> 0x09)) & 0x01) {
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pinmux_val |= eiohv_config_val;
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}
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}
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}
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u32 eschmt_config_val = ((pinmux_config_val >> 0x0D) & 0x1000);
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/* Adjust ESchmt */
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if (pinmux_config_mask_val & 0x2000) {
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/* This pin supports ESchmt change */
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if (pinmux_mask_val & 0x1000) {
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/* Change ESchmt */
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if (((pinmux_val >> 0x0C) ^ (pinmux_config_val >> 0x0D)) & 0x01) {
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pinmux_val |= eschmt_config_val;
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}
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}
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}
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u32 preemp_config_val = ((pinmux_config_val >> 0x0D) & 0x8000);
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/* Adjust Preemp */
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if (pinmux_config_mask_val & 0x10000) {
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/* This pin supports Preemp change */
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if (pinmux_mask_val & 0x8000) {
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/* Change Preemp */
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if (((pinmux_val >> 0x0F) ^ (pinmux_config_val >> 0x10)) & 0x01) {
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pinmux_val |= preemp_config_val;
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}
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}
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}
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u32 drvtype_config_val = ((pinmux_config_val >> 0x0E) & 0x6000);
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/* Adjust DrvType */
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if (pinmux_config_mask_val & 0xC000) {
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/* This pin supports DrvType change */
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if (pinmux_mask_val & 0x6000) {
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/* Change DrvType */
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if (((pinmux_val >> 0x0D) ^ (pinmux_config_val >> 0x0E)) & 0x03) {
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pinmux_val |= drvtype_config_val;
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}
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}
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}
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/* Write to the appropriate PINMUX register */
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*pinmux_reg = pinmux_val;
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/* Do a dummy read from the PINMUX register */
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pinmux_val = *pinmux_reg;
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return pinmux_val;
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}
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u32 Boot::PinmuxUpdateDrivePad(u32 pinmux_drivepad_name, u32 pinmux_drivepad_config_val, u32 pinmux_drivepad_config_mask_val) {
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const uintptr_t pinmux_base_vaddr = GetPinmuxBaseAddress();
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const PinmuxDrivePadDefinition *pinmux_drivepad_def = GetPinmuxDrivePadDefinition(pinmux_drivepad_name);
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/* Fetch this PINMUX drive group's register offset */
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u32 pinmux_drivepad_reg_offset = pinmux_drivepad_def->reg_offset;
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/* Fetch this PINMUX drive group's mask value */
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u32 pinmux_drivepad_mask_val = pinmux_drivepad_def->mask_val;
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/* Get current register ptr. */
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volatile u32 *pinmux_drivepad_reg = reinterpret_cast<volatile u32 *>(pinmux_base_vaddr + pinmux_drivepad_reg_offset);
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/* Read from the PINMUX drive group register */
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u32 pinmux_drivepad_val = *pinmux_drivepad_reg;
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/* Adjust DriveDownStrength */
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if (pinmux_drivepad_config_mask_val & 0x1F000) {
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u32 mask_val = 0x7F000;
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/* Adjust mask value */
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if ((pinmux_drivepad_mask_val & 0x7F000) != 0x7F000)
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mask_val = 0x1F000;
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/* This drive group supports DriveDownStrength change */
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if (pinmux_drivepad_mask_val & mask_val) {
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/* Change DriveDownStrength */
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if (((pinmux_drivepad_config_val & 0x7F000) & mask_val) != (pinmux_drivepad_val & mask_val)) {
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pinmux_drivepad_val &= ~(mask_val);
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pinmux_drivepad_val |= ((pinmux_drivepad_config_val & 0x7F000) & mask_val);
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}
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}
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}
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/* Adjust DriveUpStrength */
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if (pinmux_drivepad_config_mask_val & 0x1F00000) {
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u32 mask_val = 0x7F00000;
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/* Adjust mask value */
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if ((pinmux_drivepad_mask_val & 0x7F00000) != 0x7F00000)
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mask_val = 0x1F00000;
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/* This drive group supports DriveUpStrength change */
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if (pinmux_drivepad_mask_val & mask_val) {
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/* Change DriveUpStrength */
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if (((pinmux_drivepad_config_val & 0x7F00000) & mask_val) != (pinmux_drivepad_val & mask_val)) {
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pinmux_drivepad_val &= ~(mask_val);
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pinmux_drivepad_val |= ((pinmux_drivepad_config_val & 0x7F00000) & mask_val);
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}
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}
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}
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/* Adjust DriveDownSlew */
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if (pinmux_drivepad_config_mask_val & 0x30000000) {
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/* This drive group supports DriveDownSlew change */
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if (pinmux_drivepad_mask_val & 0x30000000) {
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/* Change DriveDownSlew */
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if ((pinmux_drivepad_val ^ pinmux_drivepad_config_val) & 0x30000000) {
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pinmux_drivepad_val &= 0xCFFFFFFF;
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pinmux_drivepad_val |= (pinmux_drivepad_config_val & 0x30000000);
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}
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}
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}
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/* Adjust DriveUpSlew */
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if (pinmux_drivepad_config_mask_val & 0xC0000000) {
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/* This drive group supports DriveUpSlew change */
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if (pinmux_drivepad_mask_val & 0xC0000000) {
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/* Change DriveUpSlew */
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if ((pinmux_drivepad_val ^ pinmux_drivepad_config_val) & 0xC0000000) {
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pinmux_drivepad_val &= 0x3FFFFFFF;
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pinmux_drivepad_val |= (pinmux_drivepad_config_val & 0xC0000000);
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}
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}
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}
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/* Write to the appropriate PINMUX drive group register */
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*pinmux_drivepad_reg = pinmux_drivepad_val;
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/* Do a dummy read from the PINMUX drive group register */
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pinmux_drivepad_val = *pinmux_drivepad_reg;
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return pinmux_drivepad_val;
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} |