mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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132 lines
3.5 KiB
C
132 lines
3.5 KiB
C
/*
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* Copyright (c) 2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "sysreg_traps.h"
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#include "sysreg.h"
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#include "arm.h"
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#include "debug_log.h"
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#include "software_breakpoints.h"
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static void doSystemRegisterRwImpl(u64 *val, u32 iss)
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{
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u32 op0 = (iss >> 20) & 3;
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u32 op2 = (iss >> 17) & 7;
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u32 op1 = (iss >> 14) & 7;
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u32 CRn = (iss >> 10) & 15;
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//u32 Rt = (iss >> 5) & 31;
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u32 CRm = (iss >> 1) & 15;
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u32 dir = iss & 1;
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u32 codebuf[] = {
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0, // TBD
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0xD65F03C0, // ret
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};
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codebuf[0] = dir ? MAKE_MRS_FROM_FIELDS(op0, op1, CRn, CRm, op2, 0) : MAKE_MSR_FROM_FIELDS(op0, op1, CRn, CRm, op2, 0);
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flush_dcache_range(codebuf, (u8 *)codebuf + sizeof(codebuf));
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invalidate_icache_all();
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*val = ((u64 (*)(u64))codebuf)(*val);
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}
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void doSystemRegisterRead(ExceptionStackFrame *frame, u32 iss, u32 reg)
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{
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u64 val = 0;
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iss &= ~((0x1F << 5) | 1);
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// Hooks go here:
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switch (iss) {
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default:
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break;
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}
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doSystemRegisterRwImpl(&val, iss | 1);
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writeFrameRegisterZ(frame, reg, val);
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skipFaultingInstruction(frame, 4);
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}
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void doSystemRegisterWrite(ExceptionStackFrame *frame, u32 iss, u32 reg)
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{
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u64 val = 0;
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iss &= ~((0x1F << 5) | 1);
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val = readFrameRegisterZ(frame, reg);
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bool reevalSoftwareBreakpoints = false;
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// Hooks go here:
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switch (iss) {
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case ENCODE_SYSREG_ISS(TTBR0_EL1):
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case ENCODE_SYSREG_ISS(TTBR1_EL1):
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case ENCODE_SYSREG_ISS(TCR_EL1):
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case ENCODE_SYSREG_ISS(SCTLR_EL1):
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reevalSoftwareBreakpoints = true;
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break;
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default:
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break;
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}
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if (reevalSoftwareBreakpoints) {
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revertAllSoftwareBreakpoints();
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}
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doSystemRegisterRwImpl(&val, iss);
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if (reevalSoftwareBreakpoints) {
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__dsb_sy();
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__isb();
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applyAllSoftwareBreakpoints();
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}
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skipFaultingInstruction(frame, 4);
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}
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void handleMsrMrsTrap(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr)
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{
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u32 iss = esr.iss;
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u32 reg = (iss >> 5) & 31;
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bool isRead = (iss & 1) != 0;
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if (isRead) {
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doSystemRegisterRead(frame, iss, reg);
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} else {
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doSystemRegisterWrite(frame, iss, reg);
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}
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}
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static bool evaluateMcrMrcCondition(u64 spsr, u32 condition, bool condValid)
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{
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if (!condValid) {
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// Only T32 instructions can do that
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u32 it = spsrGetT32ItFlags(spsr);
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return it == 0 || spsrEvaluateConditionCode(spsr, it >> 4);
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} else {
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return spsrEvaluateConditionCode(spsr, condition);
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}
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}
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void handleSysregAccessA32Stub(ExceptionStackFrame *frame, ExceptionSyndromeRegister esr)
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{
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// A32 stub: Skip instruction, read 0 if necessary (there are debug regs at EL0)
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if (esr.iss & 1 && evaluateMcrMrcCondition(frame->spsr_el2, (esr.iss >> 20) & 0xF, (esr.iss & BIT(24)) != 0)) {
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writeFrameRegisterZ(frame, (esr.iss >> 5) & 0x1F, 0);
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}
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skipFaultingInstruction(frame, esr.il == 0 ? 2 : 4);
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}
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