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https://github.com/Atmosphere-NX/Atmosphere.git
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107 lines
3.5 KiB
C
107 lines
3.5 KiB
C
/*
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* Copyright (c) 2018-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef FUSEE_I2C_H
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#define FUSEE_I2C_H
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#include <stdbool.h>
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#include <stdint.h>
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#include <string.h>
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#define I2C1234_BASE 0x7000C000
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#define I2C56_BASE 0x7000D000
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#define MAX77621_CPU_I2C_ADDR 0x1B
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#define MAX77621_GPU_I2C_ADDR 0x1C
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#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31
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#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33
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#define MAX17050_I2C_ADDR 0x36
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#define MAX77620_PWR_I2C_ADDR 0x3C
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#define MAX77620_RTC_I2C_ADDR 0x68
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#define BQ24193_I2C_ADDR 0x6B
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typedef enum {
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I2C_1 = 0,
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I2C_2 = 1,
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I2C_3 = 2,
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I2C_4 = 3,
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I2C_5 = 4,
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I2C_6 = 5,
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} I2CDevice;
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typedef struct {
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uint32_t I2C_I2C_CNFG_0;
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uint32_t I2C_I2C_CMD_ADDR0_0;
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uint32_t I2C_I2C_CMD_ADDR1_0;
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uint32_t I2C_I2C_CMD_DATA1_0;
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uint32_t I2C_I2C_CMD_DATA2_0;
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uint32_t _0x14;
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uint32_t _0x18;
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uint32_t I2C_I2C_STATUS_0;
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uint32_t I2C_I2C_SL_CNFG_0;
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uint32_t I2C_I2C_SL_RCVD_0;
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uint32_t I2C_I2C_SL_STATUS_0;
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uint32_t I2C_I2C_SL_ADDR1_0;
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uint32_t I2C_I2C_SL_ADDR2_0;
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uint32_t I2C_I2C_TLOW_SEXT_0;
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uint32_t _0x38;
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uint32_t I2C_I2C_SL_DELAY_COUNT_0;
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uint32_t I2C_I2C_SL_INT_MASK_0;
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uint32_t I2C_I2C_SL_INT_SOURCE_0;
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uint32_t I2C_I2C_SL_INT_SET_0;
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uint32_t _0x4C;
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uint32_t I2C_I2C_TX_PACKET_FIFO_0;
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uint32_t I2C_I2C_RX_FIFO_0;
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uint32_t I2C_PACKET_TRANSFER_STATUS_0;
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uint32_t I2C_FIFO_CONTROL_0;
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uint32_t I2C_FIFO_STATUS_0;
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uint32_t I2C_INTERRUPT_MASK_REGISTER_0;
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uint32_t I2C_INTERRUPT_STATUS_REGISTER_0;
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uint32_t I2C_I2C_CLK_DIVISOR_REGISTER_0;
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uint32_t I2C_I2C_INTERRUPT_SOURCE_REGISTER_0;
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uint32_t I2C_I2C_INTERRUPT_SET_REGISTER_0;
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uint32_t I2C_I2C_SLV_TX_PACKET_FIFO_0;
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uint32_t I2C_I2C_SLV_RX_FIFO_0;
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uint32_t I2C_I2C_SLV_PACKET_STATUS_0;
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uint32_t I2C_I2C_BUS_CLEAR_CONFIG_0;
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uint32_t I2C_I2C_BUS_CLEAR_STATUS_0;
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uint32_t I2C_I2C_CONFIG_LOAD_0;
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uint32_t _0x90;
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uint32_t I2C_I2C_INTERFACE_TIMING_0_0;
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uint32_t I2C_I2C_INTERFACE_TIMING_1_0;
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uint32_t I2C_I2C_HS_INTERFACE_TIMING_0_0;
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uint32_t I2C_I2C_HS_INTERFACE_TIMING_1_0;
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} tegra_i2c_t;
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#define I2C1_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x000))
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#define I2C2_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x400))
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#define I2C3_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x500))
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#define I2C4_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x700))
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#define I2C5_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x000))
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#define I2C6_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x100))
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void i2c_config(I2CDevice id);
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void i2c_init(I2CDevice id);
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bool i2c_query(I2CDevice id, uint8_t device, uint8_t r, void *dst, size_t dst_size);
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bool i2c_send(I2CDevice id, uint8_t device, uint8_t r, void *src, size_t src_size);
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void i2c_send_pmic_cpu_shutdown_cmd(void);
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bool i2c_query_ti_charger_bit_7(void);
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void i2c_clear_ti_charger_bit_7(void);
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void i2c_set_ti_charger_bit_7(void);
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#endif
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