mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
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205 lines
8.9 KiB
C++
205 lines
8.9 KiB
C++
/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <exosphere.hpp>
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namespace ams::i2c {
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namespace {
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constexpr inline size_t MaxTransferSize = sizeof(u32);
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constinit std::array<uintptr_t, Port_Count> g_register_addresses = [] {
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std::array<uintptr_t, Port_Count> arr = {};
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arr[Port_1] = secmon::MemoryRegionPhysicalDeviceI2c1.GetAddress();
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arr[Port_5] = secmon::MemoryRegionPhysicalDeviceI2c5.GetAddress();
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return arr;
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}();
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void LoadConfig(uintptr_t address) {
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/* Configure for TIMEOUT and MSTR config load. */
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/* NOTE: Nintendo writes value 1 to reserved bit 5 here. This bit is documented as having no meaning. */
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/* We will reproduce the write just in case it is undocumented. */
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reg::Write(address + I2C_CONFIG_LOAD, I2C_REG_BITS_VALUE(CONFIG_LOAD_RESERVED_BIT_5, 1),
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I2C_REG_BITS_ENUM (CONFIG_LOAD_TIMEOUT_CONFIG_LOAD, ENABLE),
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I2C_REG_BITS_ENUM (CONFIG_LOAD_SLV_CONFIG_LOAD, DISABLE),
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I2C_REG_BITS_ENUM (CONFIG_LOAD_MSTR_CONFIG_LOAD, ENABLE));
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/* Wait up to 20 microseconds for the master config to be loaded. */
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for (int i = 0; i < 20; ++i) {
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if (reg::HasValue(address + I2C_CONFIG_LOAD, I2C_REG_BITS_ENUM(CONFIG_LOAD_MSTR_CONFIG_LOAD, DISABLE))) {
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return;
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}
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util::WaitMicroSeconds(1);
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}
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}
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void ClearBus(uintptr_t address) {
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/* Configure the bus clear register. */
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reg::Write(address + I2C_BUS_CLEAR_CONFIG, I2C_REG_BITS_VALUE(BUS_CLEAR_CONFIG_BC_SCLK_THRESHOLD, 9),
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I2C_REG_BITS_ENUM (BUS_CLEAR_CONFIG_BC_STOP_COND, NO_STOP),
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I2C_REG_BITS_ENUM (BUS_CLEAR_CONFIG_BC_TERMINATE, IMMEDIATE),
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I2C_REG_BITS_ENUM (BUS_CLEAR_CONFIG_BC_ENABLE, ENABLE));
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/* Load the config. */
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LoadConfig(address);
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/* Wait up to 250us (in 25 us increments) until the bus clear is done. */
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for (int i = 0; i < 10; ++i) {
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if (reg::HasValue(address + I2C_INTERRUPT_STATUS_REGISTER, I2C_REG_BITS_ENUM(INTERRUPT_STATUS_REGISTER_BUS_CLEAR_DONE, SET))) {
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break;
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}
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util::WaitMicroSeconds(25);
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}
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/* Read the bus clear status. */
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reg::Read(address + I2C_BUS_CLEAR_STATUS);
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}
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void InitializePort(uintptr_t address) {
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/* Calculate the divisor. */
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constexpr int Divisor = util::DivideUp(19200, 8 * 400);
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/* Set the divisor. */
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reg::Write(address + I2C_CLK_DIVISOR_REGISTER, I2C_REG_BITS_VALUE(CLK_DIVISOR_REGISTER_STD_FAST_MODE, Divisor - 1),
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I2C_REG_BITS_VALUE(CLK_DIVISOR_REGISTER_HSMODE, 1));
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/* Clear the bus. */
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ClearBus(address);
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/* Clear the status. */
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reg::Write(address + I2C_INTERRUPT_STATUS_REGISTER, reg::Read(address + I2C_INTERRUPT_STATUS_REGISTER));
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}
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bool Write(uintptr_t base_address, Port port, int address, const void *src, size_t src_size, bool unused) {
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AMS_UNUSED(port, unused);
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/* Ensure we don't write too much. */
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u32 data = 0;
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if (src_size > MaxTransferSize) {
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return false;
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}
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/* Copy the data to a transfer word. */
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std::memcpy(std::addressof(data), src, src_size);
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/* Configure the to write the 7-bit address. */
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reg::Write(base_address + I2C_I2C_CMD_ADDR0, I2C_REG_BITS_VALUE(I2C_CMD_ADDR0_7BIT_ADDR, address),
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I2C_REG_BITS_ENUM (I2C_CMD_ADDR0_7BIT_RW, WRITE));
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/* Configure to write the data. */
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reg::Write(base_address + I2C_I2C_CMD_DATA1, data);
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/* Configure to write the correct amount of data. */
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reg::Write(base_address + I2C_I2C_CNFG, I2C_REG_BITS_ENUM (I2C_CNFG_DEBOUNCE_CNT, DEBOUNCE_4T),
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I2C_REG_BITS_ENUM (I2C_CNFG_NEW_MASTER_FSM, ENABLE),
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I2C_REG_BITS_ENUM (I2C_CNFG_CMD1, WRITE),
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I2C_REG_BITS_VALUE(I2C_CNFG_LENGTH, src_size - 1));
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/* Load the configuration. */
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LoadConfig(base_address);
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/* Start the command. */
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reg::ReadWrite(base_address + I2C_I2C_CNFG, I2C_REG_BITS_ENUM(I2C_CNFG_SEND, GO));
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/* Wait for the command to be done. */
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while (!reg::HasValue(base_address + I2C_I2C_STATUS, I2C_REG_BITS_ENUM(I2C_STATUS_BUSY, NOT_BUSY))) { /* ... */ }
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/* Check if the transfer was successful. */
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return reg::HasValue(base_address + I2C_I2C_STATUS, I2C_REG_BITS_ENUM(I2C_STATUS_CMD1_STAT, SL1_XFER_SUCCESSFUL));
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}
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bool Read(uintptr_t base_address, Port port, void *dst, size_t dst_size, int address, bool unused) {
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AMS_UNUSED(port, unused);
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/* Ensure we don't read too much. */
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if (dst_size > MaxTransferSize) {
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return false;
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}
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/* Configure the to read the 7-bit address. */
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reg::Write(base_address + I2C_I2C_CMD_ADDR0, I2C_REG_BITS_VALUE(I2C_CMD_ADDR0_7BIT_ADDR, address),
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I2C_REG_BITS_ENUM (I2C_CMD_ADDR0_7BIT_RW, READ));
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/* Configure to read the correct amount of data. */
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reg::Write(base_address + I2C_I2C_CNFG, I2C_REG_BITS_ENUM (I2C_CNFG_DEBOUNCE_CNT, DEBOUNCE_4T),
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I2C_REG_BITS_ENUM (I2C_CNFG_NEW_MASTER_FSM, ENABLE),
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I2C_REG_BITS_ENUM (I2C_CNFG_CMD1, READ),
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I2C_REG_BITS_VALUE(I2C_CNFG_LENGTH, dst_size - 1));
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/* Load the configuration. */
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LoadConfig(base_address);
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/* Start the command. */
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reg::ReadWrite(base_address + I2C_I2C_CNFG, I2C_REG_BITS_ENUM(I2C_CNFG_SEND, GO));
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/* Wait for the command to be done. */
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while (!reg::HasValue(base_address + I2C_I2C_STATUS, I2C_REG_BITS_ENUM(I2C_STATUS_BUSY, NOT_BUSY))) { /* ... */ }
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/* Check that the transfer was successful. */
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if (!reg::HasValue(base_address + I2C_I2C_STATUS, I2C_REG_BITS_ENUM(I2C_STATUS_CMD1_STAT, SL1_XFER_SUCCESSFUL))) {
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return false;
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}
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/* Read and copy out the data. */
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u32 data = reg::Read(base_address + I2C_I2C_CMD_DATA1);
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std::memcpy(dst, std::addressof(data), dst_size);
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return true;
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}
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}
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void SetRegisterAddress(Port port, uintptr_t address) {
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g_register_addresses[port] = address;
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}
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void Initialize(Port port) {
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InitializePort(g_register_addresses[port]);
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}
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bool Query(void *dst, size_t dst_size, Port port, int address, int r) {
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const uintptr_t base_address = g_register_addresses[port];
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/* Select the register we want to read. */
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bool success = Write(base_address, port, address, std::addressof(r), 1, false);
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if (success) {
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/* If we successfully selected, read data from the register. */
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success = Read(base_address, port, dst, dst_size, address, true);
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}
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return success;
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}
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bool Send(Port port, int address, int r, const void *src, size_t src_size) {
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const uintptr_t base_address = g_register_addresses[port];
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/* Create a transfer buffer, make sure we can use it. */
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u8 buffer[MaxTransferSize];
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if (src_size > sizeof(buffer) - 1) {
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return false;
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}
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/* Copy data into the buffer. */
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buffer[0] = static_cast<u8>(r);
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std::memcpy(buffer + 1, src, src_size);
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return Write(base_address, port, address, buffer, src_size + 1, false);
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}
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}
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