mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2024-11-11 14:36:40 +00:00
252 lines
No EOL
7.7 KiB
C
252 lines
No EOL
7.7 KiB
C
/*
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* Copyright (c) 2018-2019 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "utils.h"
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#include "lp0.h"
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#include "se.h"
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static void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size);
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/* Initialize a SE linked list. */
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static void __attribute__((__noinline__)) ll_init(volatile se_ll_t *ll, void *buffer, size_t size) {
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ll->num_entries = 0; /* 1 Entry. */
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if (buffer != NULL) {
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ll->addr_info.address = (uint32_t) buffer;
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ll->addr_info.size = (uint32_t) size;
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} else {
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ll->addr_info.address = 0;
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ll->addr_info.size = 0;
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}
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}
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void se_check_error_status_reg(void) {
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if (se_get_regs()->ERR_STATUS_REG) {
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reboot();
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}
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}
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void se_check_for_error(void) {
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volatile tegra_se_t *se = se_get_regs();
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if (se->INT_STATUS_REG & 0x10000 || se->FLAGS_REG & 3 || se->ERR_STATUS_REG) {
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reboot();
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}
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}
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void se_verify_flags_cleared(void) {
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if (se_get_regs()->FLAGS_REG & 3) {
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reboot();
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}
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}
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void clear_aes_keyslot(unsigned int keyslot) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX) {
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reboot();
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}
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/* Zero out the whole keyslot and IV. */
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for (unsigned int i = 0; i < 0x10; i++) {
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se->AES_KEYTABLE_ADDR = (keyslot << 4) | i;
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se->AES_KEYTABLE_DATA = 0;
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}
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}
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void clear_rsa_keyslot(unsigned int keyslot) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_RSA_MAX) {
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reboot();
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}
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/* Zero out the whole keyslot. */
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for (unsigned int i = 0; i < 0x40; i++) {
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/* Select Keyslot Modulus[i] */
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se->RSA_KEYTABLE_ADDR = (keyslot << 7) | i | 0x40;
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se->RSA_KEYTABLE_DATA = 0;
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}
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for (unsigned int i = 0; i < 0x40; i++) {
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/* Select Keyslot Expontent[i] */
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se->RSA_KEYTABLE_ADDR = (keyslot << 7) | i;
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se->RSA_KEYTABLE_DATA = 0;
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}
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}
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void clear_aes_keyslot_iv(unsigned int keyslot) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX) {
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reboot();
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}
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for (size_t i = 0; i < (0x10 >> 2); i++) {
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se->AES_KEYTABLE_ADDR = (keyslot << 4) | 8 | i;
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se->AES_KEYTABLE_DATA = 0;
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}
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}
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void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const void *src, size_t src_size) {
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volatile tegra_se_t *se = se_get_regs();
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se_ll_t in_ll;
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se_ll_t out_ll;
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ll_init(&in_ll, (void *)src, src_size);
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ll_init(&out_ll, dst, dst_size);
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/* Set the LLs. */
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se->IN_LL_ADDR_REG = (uint32_t)(&in_ll);
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se->OUT_LL_ADDR_REG = (uint32_t) (&out_ll);
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/* Set registers for operation. */
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se->ERR_STATUS_REG = se->ERR_STATUS_REG;
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se->INT_STATUS_REG = se->INT_STATUS_REG;
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se->OPERATION_REG = op;
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while (!(se->INT_STATUS_REG & 0x10)) { /* Wait a while */ }
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se_check_for_error();
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}
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/* Secure AES Functionality. */
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void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src, size_t src_size) {
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uint8_t block[0x10] = {0};
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if (src_size > sizeof(block) || dst_size > sizeof(block)) {
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reboot();
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}
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/* Load src data into block. */
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if (src_size != 0) {
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memcpy(block, src, src_size);
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}
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/* Trigger AES operation. */
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se_get_regs()->BLOCK_COUNT_REG = 0;
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trigger_se_blocking_op(OP_START, block, sizeof(block), block, sizeof(block));
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/* Copy output data into dst. */
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if (dst_size != 0) {
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memcpy(dst, block, dst_size);
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}
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}
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void se_aes_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size, unsigned int config_high) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) {
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reboot();
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}
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/* Set configuration high (256-bit vs 128-bit) based on parameter. */
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se->CONFIG_REG = (ALG_AES_ENC | DST_MEMORY) | (config_high << 16);
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se->CRYPTO_REG = keyslot << 24 | 0x100;
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se_perform_aes_block_operation(dst, 0x10, src, 0x10);
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}
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void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX || dst_size != 0x10 || src_size != 0x10) {
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reboot();
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}
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se->CONFIG_REG = (ALG_AES_DEC | DST_MEMORY);
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se->CRYPTO_REG = keyslot << 24;
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se_perform_aes_block_operation(dst, 0x10, src, 0x10);
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}
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void shift_left_xor_rb(uint8_t *key) {
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uint8_t prev_high_bit = 0;
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for (unsigned int i = 0; i < 0x10; i++) {
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uint8_t cur_byte = key[0xF - i];
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key[0xF - i] = (cur_byte << 1) | (prev_high_bit);
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prev_high_bit = cur_byte >> 7;
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}
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if (prev_high_bit) {
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key[0xF] ^= 0x87;
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}
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}
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void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size, unsigned int config_high) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX) {
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reboot();
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}
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/* Generate the derived key, to be XOR'd with final output block. */
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uint8_t ALIGN(16) derived_key[0x10] = {0};
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se_aes_ecb_encrypt_block(keyslot, derived_key, sizeof(derived_key), derived_key, sizeof(derived_key), config_high);
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shift_left_xor_rb(derived_key);
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if (data_size & 0xF) {
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shift_left_xor_rb(derived_key);
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}
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se->CONFIG_REG = (ALG_AES_ENC | DST_HASHREG) | (config_high << 16);
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se->CRYPTO_REG = (keyslot << 24) | (0x145);
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clear_aes_keyslot_iv(keyslot);
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unsigned int num_blocks = (data_size + 0xF) >> 4;
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/* Handle aligned blocks. */
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if (num_blocks > 1) {
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se->BLOCK_COUNT_REG = num_blocks - 2;
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trigger_se_blocking_op(OP_START, NULL, 0, data, data_size);
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se->CRYPTO_REG |= 0x80;
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}
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/* Create final block. */
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uint8_t ALIGN(16) last_block[0x10] = {0};
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if (data_size & 0xF) {
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memcpy(last_block, data + (data_size & ~0xF), data_size & 0xF);
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last_block[data_size & 0xF] = 0x80; /* Last block = data || 100...0 */
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} else if (data_size >= 0x10) {
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memcpy(last_block, data + data_size - 0x10, 0x10);
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}
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for (unsigned int i = 0; i < 0x10; i++) {
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last_block[i] ^= derived_key[i];
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}
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/* Perform last operation. */
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se->BLOCK_COUNT_REG = 0;
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trigger_se_blocking_op(OP_START, NULL, 0, last_block, sizeof(last_block));
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/* Copy output CMAC. */
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for (unsigned int i = 0; i < (cmac_size >> 2); i++) {
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((uint32_t *)cmac)[i] = ((volatile uint32_t *)se->HASH_RESULT_REG)[i];
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}
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}
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void se_compute_aes_256_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, const void *data, size_t data_size) {
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se_compute_aes_cmac(keyslot, cmac, cmac_size, data, data_size, 0x202);
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}
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void se_aes_256_cbc_decrypt(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) {
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volatile tegra_se_t *se = se_get_regs();
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if (keyslot >= KEYSLOT_AES_MAX || src_size < 0x10) {
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reboot();
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}
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se->CONFIG_REG = (ALG_AES_DEC | DST_MEMORY) | (0x202 << 16);
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se->CRYPTO_REG = (keyslot << 24) | 0x66;
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clear_aes_keyslot_iv(keyslot);
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se->BLOCK_COUNT_REG = (src_size >> 4) - 1;
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trigger_se_blocking_op(OP_START, dst, dst_size, src, src_size);
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} |