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Ryujinx/Ryujinx.Graphics/Shader/Instructions/InstEmitFlow.cs

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New shader translator implementation (#654) * Start implementing a new shader translator * Fix shift instructions and a typo * Small refactoring on StructuredProgram, move RemovePhis method to a separate class * Initial geometry shader support * Implement TLD4 * Fix -- There's no negation on FMUL32I * Add constant folding and algebraic simplification optimizations, nits * Some leftovers from constant folding * Avoid cast for constant assignments * Add a branch elimination pass, and misc small fixes * Remove redundant branches, add expression propagation and other improvements on the code * Small leftovers -- add missing break and continue, remove unused properties, other improvements * Add null check to handle empty block cases on block visitor * Add HADD2 and HMUL2 half float shader instructions * Optimize pack/unpack sequences, some fixes related to half float instructions * Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen * Fix copy paste mistake that caused RZ to be ignored on the AST instruction * Add workaround for conditional exit, and fix half float instruction with constant buffer * Add missing 0.0 source for TLDS.LZ variants * Simplify the switch for TLDS.LZ * Texture instructions related fixes * Implement the HFMA instruction, and some misc. fixes * Enable constant folding on UnpackHalf2x16 instructions * Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods * Remove the old shader translator * Remove ShaderDeclInfo and other unused things * Add dual vertex shader support * Add ShaderConfig, used to pass shader type and maximum cbuffer size * Move and rename some instruction enums * Move texture instructions into a separate file * Move operand GetExpression and locals management to OperandManager * Optimize opcode decoding using a simple list and binary search * Add missing condition for do-while on goto elimination * Misc. fixes on texture instructions * Simplify TLDS switch * Address PR feedback, and a nit
2019-04-18 00:57:08 +01:00
using Ryujinx.Graphics.Shader.Decoders;
using Ryujinx.Graphics.Shader.IntermediateRepresentation;
using Ryujinx.Graphics.Shader.Translation;
using System.Collections.Generic;
using System.Linq;
using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
namespace Ryujinx.Graphics.Shader.Instructions
{
static partial class InstEmit
{
public static void Bra(EmitterContext context)
{
EmitBranch(context, context.CurrBlock.Branch.Address);
}
public static void Exit(EmitterContext context)
{
OpCodeExit op = (OpCodeExit)context.CurrOp;
//TODO: Figure out how this is supposed to work in the
//presence of other condition codes.
if (op.Condition == Condition.Always)
{
context.Return();
}
}
public static void Kil(EmitterContext context)
{
context.Discard();
}
public static void Ssy(EmitterContext context)
{
OpCodeSsy op = (OpCodeSsy)context.CurrOp;
foreach (KeyValuePair<OpCodeSync, Operand> kv in op.Syncs)
{
OpCodeSync opSync = kv.Key;
Operand local = kv.Value;
int ssyIndex = opSync.Targets[op];
context.Copy(local, Const(ssyIndex));
}
}
public static void Sync(EmitterContext context)
{
OpCodeSync op = (OpCodeSync)context.CurrOp;
if (op.Targets.Count == 1)
{
//If we have only one target, then the SSY is basically
//a branch, we can produce better codegen for this case.
OpCodeSsy opSsy = op.Targets.Keys.First();
EmitBranch(context, opSsy.GetAbsoluteAddress());
}
else
{
foreach (KeyValuePair<OpCodeSsy, int> kv in op.Targets)
{
OpCodeSsy opSsy = kv.Key;
Operand label = context.GetLabel(opSsy.GetAbsoluteAddress());
Operand local = opSsy.Syncs[op];
int ssyIndex = kv.Value;
context.BranchIfTrue(label, context.ICompareEqual(local, Const(ssyIndex)));
}
}
}
private static void EmitBranch(EmitterContext context, ulong address)
{
//If we're branching to the next instruction, then the branch
//is useless and we can ignore it.
if (address == context.CurrOp.Address + 8)
{
return;
}
Operand label = context.GetLabel(address);
Operand pred = Register(context.CurrOp.Predicate);
if (context.CurrOp.Predicate.IsPT)
{
context.Branch(label);
}
else if (context.CurrOp.InvertPredicate)
{
context.BranchIfFalse(label, pred);
}
else
{
context.BranchIfTrue(label, pred);
}
}
}
}