1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-12-18 04:52:01 +00:00

Add UABD instruction

This commit is contained in:
gdkchan 2018-03-30 16:30:23 -03:00
parent ba43af5765
commit 19b8344568
2 changed files with 15 additions and 7 deletions

View file

@ -285,6 +285,7 @@ namespace ChocolArm64
Set("01111110xx1xxxxx100001xxxxxxxxxx", AInstEmit.Sub_S, typeof(AOpCodeSimdReg));
Set("0>101110<<1xxxxx100001xxxxxxxxxx", AInstEmit.Sub_V, typeof(AOpCodeSimdReg));
Set("0x001110000xxxxx0xx000xxxxxxxxxx", AInstEmit.Tbl_V, typeof(AOpCodeSimdTbl));
Set("0x101110<<1xxxxx011101xxxxxxxxxx", AInstEmit.Uabd_V, typeof(AOpCodeSimdReg));
Set("0x101110<<1xxxxx011100xxxxxxxxxx", AInstEmit.Uabdl_V, typeof(AOpCodeSimdReg));
Set("0x101110<<1xxxxx000000xxxxxxxxxx", AInstEmit.Uaddl_V, typeof(AOpCodeSimdReg));
Set("001011100x110000001110xxxxxxxxxx", AInstEmit.Uaddlv_V, typeof(AOpCodeSimd));

View file

@ -546,18 +546,25 @@ namespace ChocolArm64.Instruction
EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
}
public static void Uabd_V(AILEmitterCtx Context)
{
EmitVectorTernaryOpZx(Context, () => EmitAbd(Context));
}
public static void Uabdl_V(AILEmitterCtx Context)
{
EmitVectorWidenRnRmTernaryOpZx(Context, () =>
{
Context.Emit(OpCodes.Sub);
EmitVectorWidenRnRmTernaryOpZx(Context, () => EmitAbd(Context));
}
Type[] Types = new Type[] { typeof(long) };
private static void EmitAbd(AILEmitterCtx Context)
{
Context.Emit(OpCodes.Sub);
Context.EmitCall(typeof(Math).GetMethod(nameof(Math.Abs), Types));
Type[] Types = new Type[] { typeof(long) };
Context.Emit(OpCodes.Add);
});
Context.EmitCall(typeof(Math).GetMethod(nameof(Math.Abs), Types));
Context.Emit(OpCodes.Add);
}
public static void Uaddl_V(AILEmitterCtx Context)