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Partial GPU DMA support (#158)
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parent
f1e866e248
commit
36827c2355
4 changed files with 178 additions and 6 deletions
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@ -11,6 +11,7 @@ namespace Ryujinx.HLE.Gpu
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public NvGpuEngine2d Engine2d { get; private set; }
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public NvGpuEngine3d Engine3d { get; private set; }
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public NvGpuEngineDma EngineDma { get; private set; }
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private Thread FifoProcessing;
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@ -24,6 +25,7 @@ namespace Ryujinx.HLE.Gpu
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Engine2d = new NvGpuEngine2d(this);
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Engine3d = new NvGpuEngine3d(this);
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EngineDma = new NvGpuEngineDma(this);
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KeepRunning = true;
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142
Ryujinx.HLE/Gpu/NvGpuEngineDma.cs
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142
Ryujinx.HLE/Gpu/NvGpuEngineDma.cs
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@ -0,0 +1,142 @@
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using Ryujinx.Graphics.Gal;
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using System.Collections.Generic;
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namespace Ryujinx.HLE.Gpu
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{
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class NvGpuEngineDma : INvGpuEngine
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{
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public int[] Registers { get; private set; }
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private NvGpu Gpu;
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private Dictionary<int, NvGpuMethod> Methods;
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public NvGpuEngineDma(NvGpu Gpu)
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{
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this.Gpu = Gpu;
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Registers = new int[0x1d6];
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Methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int Meth, int Count, int Stride, NvGpuMethod Method)
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{
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while (Count-- > 0)
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{
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Methods.Add(Meth, Method);
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Meth += Stride;
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}
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}
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AddMethod(0xc0, 1, 1, Execute);
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}
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public void CallMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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if (Methods.TryGetValue(PBEntry.Method, out NvGpuMethod Method))
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{
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Method(Vmm, PBEntry);
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}
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else
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{
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WriteRegister(PBEntry);
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}
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}
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private void Execute(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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int Control = PBEntry.Arguments[0];
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bool SrcLinear = ((Control >> 7) & 1) != 0;
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bool DstLinear = ((Control >> 8) & 1) != 0;
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long SrcAddress = MakeInt64From2xInt32(NvGpuEngineDmaReg.SrcAddress);
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long DstAddress = MakeInt64From2xInt32(NvGpuEngineDmaReg.DstAddress);
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int SrcPitch = ReadRegister(NvGpuEngineDmaReg.SrcPitch);
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int DstPitch = ReadRegister(NvGpuEngineDmaReg.DstPitch);
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int DstBlkDim = ReadRegister(NvGpuEngineDmaReg.DstBlkDim);
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int DstSizeX = ReadRegister(NvGpuEngineDmaReg.DstSizeX);
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int DstSizeY = ReadRegister(NvGpuEngineDmaReg.DstSizeY);
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int DstSizeZ = ReadRegister(NvGpuEngineDmaReg.DstSizeZ);
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int DstPosXY = ReadRegister(NvGpuEngineDmaReg.DstPosXY);
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int DstPosZ = ReadRegister(NvGpuEngineDmaReg.DstPosZ);
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int SrcBlkDim = ReadRegister(NvGpuEngineDmaReg.SrcBlkDim);
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int SrcSizeX = ReadRegister(NvGpuEngineDmaReg.SrcSizeX);
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int SrcSizeY = ReadRegister(NvGpuEngineDmaReg.SrcSizeY);
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int SrcSizeZ = ReadRegister(NvGpuEngineDmaReg.SrcSizeZ);
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int SrcPosXY = ReadRegister(NvGpuEngineDmaReg.SrcPosXY);
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int SrcPosZ = ReadRegister(NvGpuEngineDmaReg.SrcPosZ);
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int DstPosX = (DstPosXY >> 0) & 0xffff;
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int DstPosY = (DstPosXY >> 16) & 0xffff;
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int SrcPosX = (SrcPosXY >> 0) & 0xffff;
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int SrcPosY = (SrcPosXY >> 16) & 0xffff;
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int SrcBlockHeight = 1 << ((SrcBlkDim >> 4) & 0xf);
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int DstBlockHeight = 1 << ((DstBlkDim >> 4) & 0xf);
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ISwizzle SrcSwizzle;
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if (SrcLinear)
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{
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SrcSwizzle = new LinearSwizzle(SrcPitch, 1);
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}
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else
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{
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SrcSwizzle = new BlockLinearSwizzle(SrcSizeX, 1, SrcBlockHeight);
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}
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ISwizzle DstSwizzle;
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if (DstLinear)
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{
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DstSwizzle = new LinearSwizzle(DstPitch, 1);
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}
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else
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{
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DstSwizzle = new BlockLinearSwizzle(DstSizeX, 1, DstBlockHeight);
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}
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for (int Y = 0; Y < DstSizeY; Y++)
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for (int X = 0; X < DstSizeX; X++)
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{
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long SrcOffset = SrcAddress + (uint)SrcSwizzle.GetSwizzleOffset(X, Y);
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long DstOffset = DstAddress + (uint)DstSwizzle.GetSwizzleOffset(X, Y);
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Vmm.WriteByte(DstOffset, Vmm.ReadByte(SrcOffset));
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}
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}
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private long MakeInt64From2xInt32(NvGpuEngineDmaReg Reg)
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{
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return
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(long)Registers[(int)Reg + 0] << 32 |
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(uint)Registers[(int)Reg + 1];
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}
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private void WriteRegister(NvGpuPBEntry PBEntry)
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{
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int ArgsCount = PBEntry.Arguments.Count;
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if (ArgsCount > 0)
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{
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Registers[PBEntry.Method] = PBEntry.Arguments[ArgsCount - 1];
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}
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}
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private int ReadRegister(NvGpuEngineDmaReg Reg)
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{
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return Registers[(int)Reg];
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}
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private void WriteRegister(NvGpuEngineDmaReg Reg, int Value)
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{
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Registers[(int)Reg] = Value;
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}
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}
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}
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22
Ryujinx.HLE/Gpu/NvGpuEngineDmaReg.cs
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22
Ryujinx.HLE/Gpu/NvGpuEngineDmaReg.cs
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@ -0,0 +1,22 @@
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namespace Ryujinx.HLE.Gpu
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{
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enum NvGpuEngineDmaReg
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{
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SrcAddress = 0x100,
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DstAddress = 0x102,
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SrcPitch = 0x104,
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DstPitch = 0x105,
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DstBlkDim = 0x1c3,
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DstSizeX = 0x1c4,
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DstSizeY = 0x1c5,
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DstSizeZ = 0x1c6,
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DstPosZ = 0x1c7,
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DstPosXY = 0x1c8,
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SrcBlkDim = 0x1ca,
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SrcSizeX = 0x1cb,
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SrcSizeY = 0x1cc,
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SrcSizeZ = 0x1cd,
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SrcPosZ = 0x1ce,
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SrcPosXY = 0x1cf
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}
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}
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@ -136,8 +136,9 @@ namespace Ryujinx.HLE.Gpu
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{
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switch (SubChannels[PBEntry.SubChannel])
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{
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case NvGpuEngine._2d: Call2dMethod(Vmm, PBEntry); break;
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case NvGpuEngine._3d: Call3dMethod(Vmm, PBEntry); break;
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case NvGpuEngine._2d: Call2dMethod (Vmm, PBEntry); break;
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case NvGpuEngine._3d: Call3dMethod (Vmm, PBEntry); break;
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case NvGpuEngine.Dma: CallDmaMethod(Vmm, PBEntry); break;
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}
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}
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}
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@ -170,5 +171,10 @@ namespace Ryujinx.HLE.Gpu
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}
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}
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}
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private void CallDmaMethod(NvGpuVmm Vmm, NvGpuPBEntry PBEntry)
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{
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Gpu.EngineDma.CallMethod(Vmm, PBEntry);
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}
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}
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}
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