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Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88)
* Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update AOpCodeTable.cs
This commit is contained in:
parent
7450b9d68a
commit
8b75080639
2 changed files with 40 additions and 2 deletions
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@ -133,6 +133,9 @@ namespace ChocolArm64
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Set("10011011110xxxxx0xxxxxxxxxxxxxxx", AInstEmit.Umulh, typeof(AOpCodeMul));
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Set("10011011110xxxxx0xxxxxxxxxxxxxxx", AInstEmit.Umulh, typeof(AOpCodeMul));
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//Vector
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//Vector
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Set("0101111011100000101110xxxxxxxxxx", AInstEmit.Abs_S, typeof(AOpCodeSimd));
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Set("0>001110<<100000101110xxxxxxxxxx", AInstEmit.Abs_V, typeof(AOpCodeSimd));
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Set("01011110111xxxxx100001xxxxxxxxxx", AInstEmit.Add_S, typeof(AOpCodeSimdReg));
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Set("0>001110<<1xxxxx100001xxxxxxxxxx", AInstEmit.Add_V, typeof(AOpCodeSimdReg));
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Set("0>001110<<1xxxxx100001xxxxxxxxxx", AInstEmit.Add_V, typeof(AOpCodeSimdReg));
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Set("01011110xx110001101110xxxxxxxxxx", AInstEmit.Addp_S, typeof(AOpCodeSimd));
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Set("01011110xx110001101110xxxxxxxxxx", AInstEmit.Addp_S, typeof(AOpCodeSimd));
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Set("0>001110<<1xxxxx101111xxxxxxxxxx", AInstEmit.Addp_V, typeof(AOpCodeSimdReg));
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Set("0>001110<<1xxxxx101111xxxxxxxxxx", AInstEmit.Addp_V, typeof(AOpCodeSimdReg));
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@ -280,7 +283,8 @@ namespace ChocolArm64
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Set("0x10111100000xxx0xx001xxxxxxxxxx", AInstEmit.Mvni_V, typeof(AOpCodeSimdImm));
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Set("0x10111100000xxx0xx001xxxxxxxxxx", AInstEmit.Mvni_V, typeof(AOpCodeSimdImm));
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Set("0x10111100000xxx10x001xxxxxxxxxx", AInstEmit.Mvni_V, typeof(AOpCodeSimdImm));
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Set("0x10111100000xxx10x001xxxxxxxxxx", AInstEmit.Mvni_V, typeof(AOpCodeSimdImm));
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Set("0x10111100000xxx110x01xxxxxxxxxx", AInstEmit.Mvni_V, typeof(AOpCodeSimdImm));
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Set("0x10111100000xxx110x01xxxxxxxxxx", AInstEmit.Mvni_V, typeof(AOpCodeSimdImm));
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Set("0>101110<<100000101110xxxxxxxxxx", AInstEmit.Neg_V, typeof(AOpCodeSimdReg));
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Set("0111111011100000101110xxxxxxxxxx", AInstEmit.Neg_S, typeof(AOpCodeSimd));
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Set("0>101110<<100000101110xxxxxxxxxx", AInstEmit.Neg_V, typeof(AOpCodeSimd));
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Set("0x10111000100000010110xxxxxxxxxx", AInstEmit.Not_V, typeof(AOpCodeSimd));
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Set("0x10111000100000010110xxxxxxxxxx", AInstEmit.Not_V, typeof(AOpCodeSimd));
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Set("0x001110101xxxxx000111xxxxxxxxxx", AInstEmit.Orr_V, typeof(AOpCodeSimdReg));
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Set("0x001110101xxxxx000111xxxxxxxxxx", AInstEmit.Orr_V, typeof(AOpCodeSimdReg));
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Set("0x00111100000xxx<<x101xxxxxxxxxx", AInstEmit.Orr_Vi, typeof(AOpCodeSimdImm));
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Set("0x00111100000xxx<<x101xxxxxxxxxx", AInstEmit.Orr_Vi, typeof(AOpCodeSimdImm));
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@ -313,7 +317,7 @@ namespace ChocolArm64
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Set("xx111100x00xxxxxxxxx11xxxxxxxxxx", AInstEmit.Str, typeof(AOpCodeSimdMemImm));
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Set("xx111100x00xxxxxxxxx11xxxxxxxxxx", AInstEmit.Str, typeof(AOpCodeSimdMemImm));
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Set("xx111101x0xxxxxxxxxxxxxxxxxxxxxx", AInstEmit.Str, typeof(AOpCodeSimdMemImm));
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Set("xx111101x0xxxxxxxxxxxxxxxxxxxxxx", AInstEmit.Str, typeof(AOpCodeSimdMemImm));
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Set("xx111100x01xxxxxxxxx10xxxxxxxxxx", AInstEmit.Str, typeof(AOpCodeSimdMemReg));
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Set("xx111100x01xxxxxxxxx10xxxxxxxxxx", AInstEmit.Str, typeof(AOpCodeSimdMemReg));
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Set("01111110xx1xxxxx100001xxxxxxxxxx", AInstEmit.Sub_S, typeof(AOpCodeSimdReg));
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Set("01111110111xxxxx100001xxxxxxxxxx", AInstEmit.Sub_S, typeof(AOpCodeSimdReg));
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Set("0>101110<<1xxxxx100001xxxxxxxxxx", AInstEmit.Sub_V, typeof(AOpCodeSimdReg));
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Set("0>101110<<1xxxxx100001xxxxxxxxxx", AInstEmit.Sub_V, typeof(AOpCodeSimdReg));
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Set("0x001110000xxxxx0xx000xxxxxxxxxx", AInstEmit.Tbl_V, typeof(AOpCodeSimdTbl));
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Set("0x001110000xxxxx0xx000xxxxxxxxxx", AInstEmit.Tbl_V, typeof(AOpCodeSimdTbl));
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Set("0>001110<<0xxxxx001010xxxxxxxxxx", AInstEmit.Trn1_V, typeof(AOpCodeSimdReg));
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Set("0>001110<<0xxxxx001010xxxxxxxxxx", AInstEmit.Trn1_V, typeof(AOpCodeSimdReg));
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@ -11,6 +11,35 @@ namespace ChocolArm64.Instruction
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{
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{
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static partial class AInstEmit
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static partial class AInstEmit
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{
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{
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public static void Abs_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpSx(Context, () => EmitAbs(Context));
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}
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public static void Abs_V(AILEmitterCtx Context)
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{
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EmitVectorUnaryOpSx(Context, () => EmitAbs(Context));
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}
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private static void EmitAbs(AILEmitterCtx Context)
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{
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AILLabel LblTrue = new AILLabel();
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Context.Emit(OpCodes.Dup);
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Context.Emit(OpCodes.Ldc_I4_0);
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Context.Emit(OpCodes.Bge_S, LblTrue);
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Context.Emit(OpCodes.Neg);
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Context.MarkLabel(LblTrue);
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}
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public static void Add_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Add_V(AILEmitterCtx Context)
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public static void Add_V(AILEmitterCtx Context)
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{
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{
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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@ -738,6 +767,11 @@ namespace ChocolArm64.Instruction
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EmitVectorBinaryOpByElemZx(Context, () => Context.Emit(OpCodes.Mul));
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EmitVectorBinaryOpByElemZx(Context, () => Context.Emit(OpCodes.Mul));
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}
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}
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public static void Neg_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
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}
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public static void Neg_V(AILEmitterCtx Context)
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public static void Neg_V(AILEmitterCtx Context)
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{
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{
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EmitVectorUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
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EmitVectorUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
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