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https://github.com/Ryujinx/Ryujinx.git
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[Ryujinx.Tests.Unicorn] Address dotnet-format issues (#5391)
* dotnet format style --severity info Some changes were manually reverted. * Restore a few unused methods and variables * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Add comments to disabled warnings * Simplify properties and array initialization, Use const when possible, Remove trailing commas * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * Final dotnet format pass and fix naming rule violations
This commit is contained in:
TSRBerry
GitHub
parent
e3bacfa774
commit
bddb2a1483
5 changed files with 75 additions and 75 deletions
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@ -4,12 +4,12 @@ namespace Ryujinx.Tests.Unicorn
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{
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public class IndexedProperty<TIndex, TValue>
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{
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private Func<TIndex, TValue> _getFunc;
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private Action<TIndex, TValue> _setAction;
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private readonly Func<TIndex, TValue> _getFunc;
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private readonly Action<TIndex, TValue> _setAction;
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public IndexedProperty(Func<TIndex, TValue> getFunc, Action<TIndex, TValue> setAction)
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{
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_getFunc = getFunc;
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_getFunc = getFunc;
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_setAction = setAction;
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}
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@ -11,4 +11,4 @@ namespace Ryujinx.Tests.Unicorn
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Exec = 4,
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All = 7,
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}
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}
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}
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@ -2,7 +2,7 @@ using System;
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namespace Ryujinx.Tests.Unicorn
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{
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public struct SimdValue : IEquatable<SimdValue>
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public readonly struct SimdValue : IEquatable<SimdValue>
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{
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private readonly ulong _e0;
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private readonly ulong _e1;
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@ -39,31 +39,29 @@ namespace Ryujinx.Tests.Unicorn
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return BitConverter.Int64BitsToDouble(GetInt64(index));
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}
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public int GetInt32(int index) => (int)GetUInt32(index);
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public int GetInt32(int index) => (int)GetUInt32(index);
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public long GetInt64(int index) => (long)GetUInt64(index);
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public uint GetUInt32(int index)
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{
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switch (index)
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return index switch
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{
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case 0: return (uint)(_e0 >> 0);
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case 1: return (uint)(_e0 >> 32);
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case 2: return (uint)(_e1 >> 0);
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case 3: return (uint)(_e1 >> 32);
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}
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throw new ArgumentOutOfRangeException(nameof(index));
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0 => (uint)(_e0 >> 0),
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1 => (uint)(_e0 >> 32),
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2 => (uint)(_e1 >> 0),
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3 => (uint)(_e1 >> 32),
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_ => throw new ArgumentOutOfRangeException(nameof(index)),
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};
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}
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public ulong GetUInt64(int index)
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{
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switch (index)
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return index switch
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{
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case 0: return _e0;
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case 1: return _e1;
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}
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throw new ArgumentOutOfRangeException(nameof(index));
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0 => _e0,
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1 => _e1,
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_ => throw new ArgumentOutOfRangeException(nameof(index)),
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};
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}
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public byte[] ToArray()
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@ -109,4 +107,4 @@ namespace Ryujinx.Tests.Unicorn
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return $"0x{_e1:X16}{_e0:X16}";
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}
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}
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}
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}
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@ -5,7 +5,7 @@ namespace Ryujinx.Tests.Unicorn
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{
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public class UnicornAArch32 : IDisposable
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{
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internal readonly UnicornEngine.Unicorn uc;
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internal readonly UnicornEngine.Unicorn Uc;
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private bool _isDisposed;
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public IndexedProperty<int, uint> R => new(GetX, SetX);
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@ -84,7 +84,7 @@ namespace Ryujinx.Tests.Unicorn
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public UnicornAArch32()
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{
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uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM, Common.UC_MODE_LITTLE_ENDIAN);
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Uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM, Common.UC_MODE_LITTLE_ENDIAN);
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SetRegister(Arm.UC_ARM_REG_C1_C0_2, GetRegister(Arm.UC_ARM_REG_C1_C0_2) | 0xf00000);
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SetRegister(Arm.UC_ARM_REG_FPEXC, 0x40000000);
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@ -105,7 +105,7 @@ namespace Ryujinx.Tests.Unicorn
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{
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if (!_isDisposed)
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{
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uc.Close();
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Uc.Close();
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_isDisposed = true;
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}
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}
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@ -113,7 +113,7 @@ namespace Ryujinx.Tests.Unicorn
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public void RunForCount(ulong count)
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{
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// FIXME: untilAddr should be 0xFFFFFFFFFFFFFFFFu
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uc.EmuStart(this.PC, -1, 0, (long)count);
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Uc.EmuStart(this.PC, -1, 0, (long)count);
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}
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public void Step()
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@ -121,7 +121,7 @@ namespace Ryujinx.Tests.Unicorn
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RunForCount(1);
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}
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private static int[] XRegisters =
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private static readonly int[] _xRegisters =
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{
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Arm.UC_ARM_REG_R0,
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Arm.UC_ARM_REG_R1,
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@ -141,7 +141,8 @@ namespace Ryujinx.Tests.Unicorn
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Arm.UC_ARM_REG_R15,
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};
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private static int[] QRegisters =
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#pragma warning disable IDE0051, IDE0052 // Remove unused private member
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private static readonly int[] _qRegisters =
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{
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Arm.UC_ARM_REG_Q0,
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Arm.UC_ARM_REG_Q1,
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@ -160,6 +161,7 @@ namespace Ryujinx.Tests.Unicorn
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Arm.UC_ARM_REG_Q14,
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Arm.UC_ARM_REG_Q15
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};
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#pragma warning restore IDE0051, IDE0052
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public uint GetX(int index)
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{
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@ -168,7 +170,7 @@ namespace Ryujinx.Tests.Unicorn
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throw new ArgumentOutOfRangeException(nameof(index));
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}
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return GetRegister(XRegisters[index]);
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return GetRegister(_xRegisters[index]);
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}
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public void SetX(int index, uint value)
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@ -178,7 +180,7 @@ namespace Ryujinx.Tests.Unicorn
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throw new ArgumentOutOfRangeException(nameof(index));
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}
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SetRegister(XRegisters[index], value);
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SetRegister(_xRegisters[index], value);
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}
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public SimdValue GetQ(int index)
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@ -206,7 +208,7 @@ namespace Ryujinx.Tests.Unicorn
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{
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byte[] data = new byte[4];
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uc.RegRead(register, data);
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Uc.RegRead(register, data);
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return BitConverter.ToUInt32(data, 0);
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}
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@ -215,16 +217,16 @@ namespace Ryujinx.Tests.Unicorn
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{
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byte[] data = BitConverter.GetBytes(value);
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uc.RegWrite(register, data);
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Uc.RegWrite(register, data);
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}
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public SimdValue GetVector(int register)
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{
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byte[] data = new byte[8];
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uc.RegRead(register, data);
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Uc.RegRead(register, data);
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ulong lo = BitConverter.ToUInt64(data, 0);
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uc.RegRead(register + 1, data);
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Uc.RegRead(register + 1, data);
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ulong hi = BitConverter.ToUInt64(data, 0);
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return new SimdValue(lo, hi);
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@ -233,16 +235,16 @@ namespace Ryujinx.Tests.Unicorn
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private void SetVector(int register, SimdValue value)
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{
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byte[] data = BitConverter.GetBytes(value.GetUInt64(0));
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uc.RegWrite(register, data);
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Uc.RegWrite(register, data);
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data = BitConverter.GetBytes(value.GetUInt64(1));
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uc.RegWrite(register + 1, data);
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Uc.RegWrite(register + 1, data);
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}
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public byte[] MemoryRead(ulong address, ulong size)
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{
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byte[] value = new byte[size];
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uc.MemRead((long)address, value);
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Uc.MemRead((long)address, value);
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return value;
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}
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@ -254,7 +256,7 @@ namespace Ryujinx.Tests.Unicorn
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public void MemoryWrite(ulong address, byte[] value)
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{
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uc.MemWrite((long)address, value);
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Uc.MemWrite((long)address, value);
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}
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public void MemoryWrite8(ulong address, byte value) => MemoryWrite(address, new[] { value });
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@ -267,17 +269,17 @@ namespace Ryujinx.Tests.Unicorn
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public void MemoryMap(ulong address, ulong size, MemoryPermission permissions)
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{
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uc.MemMap((long)address, (long)size, (int)permissions);
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Uc.MemMap((long)address, (long)size, (int)permissions);
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}
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public void MemoryUnmap(ulong address, ulong size)
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{
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uc.MemUnmap((long)address, (long)size);
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Uc.MemUnmap((long)address, (long)size);
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}
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public void MemoryProtect(ulong address, ulong size, MemoryPermission permissions)
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{
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uc.MemProtect((long)address, (long)size, (int)permissions);
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Uc.MemProtect((long)address, (long)size, (int)permissions);
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}
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}
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}
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}
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@ -5,7 +5,7 @@ namespace Ryujinx.Tests.Unicorn
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{
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public class UnicornAArch64 : IDisposable
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{
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internal readonly UnicornEngine.Unicorn uc;
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internal readonly UnicornEngine.Unicorn Uc;
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private bool _isDisposed;
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public IndexedProperty<int, ulong> X => new(GetX, SetX);
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@ -33,48 +33,48 @@ namespace Ryujinx.Tests.Unicorn
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public uint Pstate
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{
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get => (uint)GetRegister(Arm64.UC_ARM64_REG_PSTATE);
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set => SetRegister(Arm64.UC_ARM64_REG_PSTATE, value);
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set => SetRegister(Arm64.UC_ARM64_REG_PSTATE, value);
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}
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public int Fpcr
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{
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get => (int)GetRegister(Arm64.UC_ARM64_REG_FPCR);
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set => SetRegister(Arm64.UC_ARM64_REG_FPCR, (uint)value);
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set => SetRegister(Arm64.UC_ARM64_REG_FPCR, (uint)value);
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}
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public int Fpsr
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{
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get => (int)GetRegister(Arm64.UC_ARM64_REG_FPSR);
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set => SetRegister(Arm64.UC_ARM64_REG_FPSR, (uint)value);
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set => SetRegister(Arm64.UC_ARM64_REG_FPSR, (uint)value);
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}
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public bool OverflowFlag
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{
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get => (Pstate & 0x10000000u) != 0;
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get => (Pstate & 0x10000000u) != 0;
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set => Pstate = (Pstate & ~0x10000000u) | (value ? 0x10000000u : 0u);
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}
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public bool CarryFlag
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{
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get => (Pstate & 0x20000000u) != 0;
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get => (Pstate & 0x20000000u) != 0;
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set => Pstate = (Pstate & ~0x20000000u) | (value ? 0x20000000u : 0u);
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}
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public bool ZeroFlag
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{
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get => (Pstate & 0x40000000u) != 0;
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get => (Pstate & 0x40000000u) != 0;
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set => Pstate = (Pstate & ~0x40000000u) | (value ? 0x40000000u : 0u);
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}
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public bool NegativeFlag
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{
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get => (Pstate & 0x80000000u) != 0;
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get => (Pstate & 0x80000000u) != 0;
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set => Pstate = (Pstate & ~0x80000000u) | (value ? 0x80000000u : 0u);
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}
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public UnicornAArch64()
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{
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uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM64, Common.UC_MODE_LITTLE_ENDIAN);
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Uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM64, Common.UC_MODE_LITTLE_ENDIAN);
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SetRegister(Arm64.UC_ARM64_REG_CPACR_EL1, 0x00300000);
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}
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@ -94,7 +94,7 @@ namespace Ryujinx.Tests.Unicorn
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{
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if (!_isDisposed)
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{
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uc.Close();
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Uc.Close();
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_isDisposed = true;
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}
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}
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@ -102,7 +102,7 @@ namespace Ryujinx.Tests.Unicorn
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public void RunForCount(ulong count)
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{
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// FIXME: untilAddr should be 0xFFFFFFFFFFFFFFFFul
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uc.EmuStart((long)this.PC, -1, 0, (long)count);
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Uc.EmuStart((long)this.PC, -1, 0, (long)count);
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}
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public void Step()
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@ -110,7 +110,7 @@ namespace Ryujinx.Tests.Unicorn
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RunForCount(1);
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}
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private static int[] XRegisters =
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private static readonly int[] _xRegisters =
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{
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Arm64.UC_ARM64_REG_X0,
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Arm64.UC_ARM64_REG_X1,
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@ -145,7 +145,7 @@ namespace Ryujinx.Tests.Unicorn
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Arm64.UC_ARM64_REG_X30,
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};
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private static int[] QRegisters =
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private static readonly int[] _qRegisters =
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{
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Arm64.UC_ARM64_REG_Q0,
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Arm64.UC_ARM64_REG_Q1,
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@ -188,7 +188,7 @@ namespace Ryujinx.Tests.Unicorn
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throw new ArgumentOutOfRangeException(nameof(index));
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}
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return GetRegister(XRegisters[index]);
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return GetRegister(_xRegisters[index]);
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}
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public void SetX(int index, ulong value)
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@ -198,7 +198,7 @@ namespace Ryujinx.Tests.Unicorn
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throw new ArgumentOutOfRangeException(nameof(index));
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}
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SetRegister(XRegisters[index], value);
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SetRegister(_xRegisters[index], value);
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}
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public SimdValue GetQ(int index)
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@ -208,7 +208,7 @@ namespace Ryujinx.Tests.Unicorn
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throw new ArgumentOutOfRangeException(nameof(index));
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}
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return GetVector(QRegisters[index]);
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return GetVector(_qRegisters[index]);
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}
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public void SetQ(int index, SimdValue value)
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@ -218,14 +218,14 @@ namespace Ryujinx.Tests.Unicorn
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throw new ArgumentOutOfRangeException(nameof(index));
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}
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SetVector(QRegisters[index], value);
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SetVector(_qRegisters[index], value);
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}
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private ulong GetRegister(int register)
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{
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byte[] data = new byte[8];
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uc.RegRead(register, data);
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Uc.RegRead(register, data);
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return BitConverter.ToUInt64(data, 0);
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}
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@ -234,14 +234,14 @@ namespace Ryujinx.Tests.Unicorn
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{
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byte[] data = BitConverter.GetBytes(value);
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uc.RegWrite(register, data);
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Uc.RegWrite(register, data);
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}
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private SimdValue GetVector(int register)
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{
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byte[] data = new byte[16];
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uc.RegRead(register, data);
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Uc.RegRead(register, data);
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return new SimdValue(data);
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}
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@ -250,49 +250,49 @@ namespace Ryujinx.Tests.Unicorn
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{
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byte[] data = value.ToArray();
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uc.RegWrite(register, data);
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Uc.RegWrite(register, data);
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}
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public byte[] MemoryRead(ulong address, ulong size)
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{
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byte[] value = new byte[size];
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uc.MemRead((long)address, value);
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Uc.MemRead((long)address, value);
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return value;
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}
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public byte MemoryRead8 (ulong address) => MemoryRead(address, 1)[0];
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public byte MemoryRead8(ulong address) => MemoryRead(address, 1)[0];
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public ushort MemoryRead16(ulong address) => BitConverter.ToUInt16(MemoryRead(address, 2), 0);
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public uint MemoryRead32(ulong address) => BitConverter.ToUInt32(MemoryRead(address, 4), 0);
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public ulong MemoryRead64(ulong address) => BitConverter.ToUInt64(MemoryRead(address, 8), 0);
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public uint MemoryRead32(ulong address) => BitConverter.ToUInt32(MemoryRead(address, 4), 0);
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public ulong MemoryRead64(ulong address) => BitConverter.ToUInt64(MemoryRead(address, 8), 0);
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public void MemoryWrite(ulong address, byte[] value)
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{
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uc.MemWrite((long)address, value);
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Uc.MemWrite((long)address, value);
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}
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public void MemoryWrite8 (ulong address, byte value) => MemoryWrite(address, new[]{ value });
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public void MemoryWrite16(ulong address, short value) => MemoryWrite(address, BitConverter.GetBytes(value));
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public void MemoryWrite8(ulong address, byte value) => MemoryWrite(address, new[] { value });
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public void MemoryWrite16(ulong address, short value) => MemoryWrite(address, BitConverter.GetBytes(value));
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public void MemoryWrite16(ulong address, ushort value) => MemoryWrite(address, BitConverter.GetBytes(value));
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public void MemoryWrite32(ulong address, int value) => MemoryWrite(address, BitConverter.GetBytes(value));
|
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public void MemoryWrite32(ulong address, int value) => MemoryWrite(address, BitConverter.GetBytes(value));
|
||||
public void MemoryWrite32(ulong address, uint value) => MemoryWrite(address, BitConverter.GetBytes(value));
|
||||
public void MemoryWrite64(ulong address, long value) => MemoryWrite(address, BitConverter.GetBytes(value));
|
||||
public void MemoryWrite64(ulong address, long value) => MemoryWrite(address, BitConverter.GetBytes(value));
|
||||
public void MemoryWrite64(ulong address, ulong value) => MemoryWrite(address, BitConverter.GetBytes(value));
|
||||
|
||||
public void MemoryMap(ulong address, ulong size, MemoryPermission permissions)
|
||||
{
|
||||
uc.MemMap((long)address, (long)size, (int)permissions);
|
||||
Uc.MemMap((long)address, (long)size, (int)permissions);
|
||||
}
|
||||
|
||||
public void MemoryUnmap(ulong address, ulong size)
|
||||
{
|
||||
uc.MemUnmap((long)address, (long)size);
|
||||
Uc.MemUnmap((long)address, (long)size);
|
||||
}
|
||||
|
||||
public void MemoryProtect(ulong address, ulong size, MemoryPermission permissions)
|
||||
{
|
||||
uc.MemProtect((long)address, (long)size, (int)permissions);
|
||||
Uc.MemProtect((long)address, (long)size, (int)permissions);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue