mirror of
https://github.com/Ryujinx/Ryujinx.git
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Implement some 32-bit Thumb instructions (#3614)
* Implement some 32-bit Thumb instructions * Optimize OpCode32MemMult using PopCount
This commit is contained in:
parent
b994dafe7a
commit
eba682b767
13 changed files with 190 additions and 15 deletions
8
ARMeilleure/Decoders/IOpCode32MemRsImm.cs
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8
ARMeilleure/Decoders/IOpCode32MemRsImm.cs
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@ -0,0 +1,8 @@
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namespace ARMeilleure.Decoders
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{
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interface IOpCode32MemRsImm : IOpCode32Mem
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{
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int Rm { get; }
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ShiftType ShiftType { get; }
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}
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}
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@ -1,3 +1,5 @@
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using System.Numerics;
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namespace ARMeilleure.Decoders
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namespace ARMeilleure.Decoders
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{
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{
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class OpCode32MemMult : OpCode32, IOpCode32MemMult
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class OpCode32MemMult : OpCode32, IOpCode32MemMult
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@ -23,14 +25,7 @@ namespace ARMeilleure.Decoders
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RegisterMask = opCode & 0xffff;
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RegisterMask = opCode & 0xffff;
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int regsSize = 0;
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int regsSize = BitOperations.PopCount((uint)RegisterMask) * 4;
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for (int index = 0; index < 16; index++)
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{
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regsSize += (RegisterMask >> index) & 1;
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}
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regsSize *= 4;
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if (!u)
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if (!u)
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{
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{
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@ -1,6 +1,6 @@
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namespace ARMeilleure.Decoders
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namespace ARMeilleure.Decoders
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{
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{
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class OpCode32MemRsImm : OpCode32Mem
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class OpCode32MemRsImm : OpCode32Mem, IOpCode32MemRsImm
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{
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{
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public int Rm { get; }
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public int Rm { get; }
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public ShiftType ShiftType { get; }
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public ShiftType ShiftType { get; }
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@ -1,10 +1,10 @@
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namespace ARMeilleure.Decoders
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namespace ARMeilleure.Decoders
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{
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{
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class OpCodeT16BImmCmp : OpCodeT16
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class OpCodeT16BImmCmp : OpCodeT16, IOpCode32BImm
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{
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{
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public int Rn { get; }
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public int Rn { get; }
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public int Immediate { get; }
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public long Immediate { get; }
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public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16BImmCmp(inst, address, opCode);
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public static new OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT16BImmCmp(inst, address, opCode);
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31
ARMeilleure/Decoders/OpCodeT32MemImm8D.cs
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31
ARMeilleure/Decoders/OpCodeT32MemImm8D.cs
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@ -0,0 +1,31 @@
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namespace ARMeilleure.Decoders
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{
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class OpCodeT32MemImm8D : OpCodeT32, IOpCode32Mem
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{
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public int Rt { get; }
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public int Rt2 { get; }
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public int Rn { get; }
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public bool WBack { get; }
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public bool IsLoad { get; }
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public bool Index { get; }
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public bool Add { get; }
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public int Immediate { get; }
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemImm8D(inst, address, opCode);
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public OpCodeT32MemImm8D(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rt2 = (opCode >> 8) & 0xf;
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Rt = (opCode >> 12) & 0xf;
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Rn = (opCode >> 16) & 0xf;
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Index = ((opCode >> 24) & 1) != 0;
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Add = ((opCode >> 23) & 1) != 0;
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WBack = ((opCode >> 21) & 1) != 0;
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Immediate = opCode & 0xff;
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IsLoad = ((opCode >> 20) & 1) != 0;
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}
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}
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}
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24
ARMeilleure/Decoders/OpCodeT32MemLdEx.cs
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24
ARMeilleure/Decoders/OpCodeT32MemLdEx.cs
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@ -0,0 +1,24 @@
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namespace ARMeilleure.Decoders
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{
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class OpCodeT32MemLdEx : OpCodeT32, IOpCode32MemEx
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{
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public int Rd => 0;
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public int Rt { get; }
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public int Rn { get; }
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public bool WBack => false;
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public bool IsLoad => true;
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public bool Index => false;
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public bool Add => false;
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public int Immediate => 0;
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemLdEx(inst, address, opCode);
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public OpCodeT32MemLdEx(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rt = (opCode >> 12) & 0xf;
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Rn = (opCode >> 16) & 0xf;
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}
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}
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}
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52
ARMeilleure/Decoders/OpCodeT32MemMult.cs
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52
ARMeilleure/Decoders/OpCodeT32MemMult.cs
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@ -0,0 +1,52 @@
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using System.Numerics;
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namespace ARMeilleure.Decoders
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{
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class OpCodeT32MemMult : OpCodeT32, IOpCode32MemMult
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{
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public int Rn { get; }
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public int RegisterMask { get; }
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public int Offset { get; }
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public int PostOffset { get; }
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public bool IsLoad { get; }
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemMult(inst, address, opCode);
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public OpCodeT32MemMult(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rn = (opCode >> 16) & 0xf;
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bool isLoad = (opCode & (1 << 20)) != 0;
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bool w = (opCode & (1 << 21)) != 0;
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bool u = (opCode & (1 << 23)) != 0;
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bool p = (opCode & (1 << 24)) != 0;
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RegisterMask = opCode & 0xffff;
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int regsSize = BitOperations.PopCount((uint)RegisterMask) * 4;
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if (!u)
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{
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Offset -= regsSize;
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}
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if (u == p)
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{
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Offset += 4;
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}
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if (w)
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{
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PostOffset = u ? regsSize : -regsSize;
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}
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else
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{
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PostOffset = 0;
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}
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IsLoad = isLoad;
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}
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}
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}
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30
ARMeilleure/Decoders/OpCodeT32MemRsImm.cs
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30
ARMeilleure/Decoders/OpCodeT32MemRsImm.cs
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@ -0,0 +1,30 @@
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namespace ARMeilleure.Decoders
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{
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class OpCodeT32MemRsImm : OpCodeT32, IOpCode32MemRsImm
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{
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public int Rt { get; }
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public int Rn { get; }
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public int Rm { get; }
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public ShiftType ShiftType => ShiftType.Lsl;
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public bool WBack => false;
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public bool IsLoad { get; }
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public bool Index => true;
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public bool Add => true;
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public int Immediate { get; }
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemRsImm(inst, address, opCode);
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public OpCodeT32MemRsImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rm = (opCode >> 0) & 0xf;
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Rt = (opCode >> 12) & 0xf;
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Rn = (opCode >> 16) & 0xf;
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IsLoad = (opCode & (1 << 20)) != 0;
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Immediate = (opCode >> 4) & 3;
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}
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}
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}
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25
ARMeilleure/Decoders/OpCodeT32MemStEx.cs
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25
ARMeilleure/Decoders/OpCodeT32MemStEx.cs
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namespace ARMeilleure.Decoders
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{
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class OpCodeT32MemStEx : OpCodeT32, IOpCode32MemEx
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{
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public int Rd { get; }
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public int Rt { get; }
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public int Rn { get; }
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public bool WBack => false;
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public bool IsLoad => false;
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public bool Index => false;
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public bool Add => false;
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public int Immediate => 0;
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32MemStEx(inst, address, opCode);
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public OpCodeT32MemStEx(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rd = (opCode >> 0) & 0xf;
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Rt = (opCode >> 12) & 0xf;
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Rn = (opCode >> 16) & 0xf;
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}
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}
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}
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@ -1070,14 +1070,19 @@ namespace ARMeilleure.Decoders
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SetT32("11110x011011xxxx0xxx1111xxxxxxxx", InstName.Cmp, InstEmit32.Cmp, OpCodeT32AluImm.Create);
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SetT32("11110x011011xxxx0xxx1111xxxxxxxx", InstName.Cmp, InstEmit32.Cmp, OpCodeT32AluImm.Create);
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SetT32("11101010100<xxxx0xxx<<<<xxxxxxxx", InstName.Eor, InstEmit32.Eor, OpCodeT32AluRsImm.Create);
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SetT32("11101010100<xxxx0xxx<<<<xxxxxxxx", InstName.Eor, InstEmit32.Eor, OpCodeT32AluRsImm.Create);
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SetT32("11110x00100<xxxx0xxx<<<<xxxxxxxx", InstName.Eor, InstEmit32.Eor, OpCodeT32AluImm.Create);
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SetT32("11110x00100<xxxx0xxx<<<<xxxxxxxx", InstName.Eor, InstEmit32.Eor, OpCodeT32AluImm.Create);
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SetT32("111010001101xxxxxxxx111111101111", InstName.Ldaex, InstEmit32.Ldaex, OpCodeT32MemLdEx.Create);
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SetT32("1110100010x1xxxxxxxxxxxxxxxxxxxx", InstName.Ldm, InstEmit32.Ldm, OpCodeT32MemMult.Create);
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SetT32("1110100100x1xxxxxxxxxxxxxxxxxxxx", InstName.Ldm, InstEmit32.Ldm, OpCodeT32MemMult.Create);
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SetT32("111110000101xxxx<<<<10x1xxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm8.Create);
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SetT32("111110000101xxxx<<<<10x1xxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm8.Create);
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SetT32("111110000101xxxx<<<<1100xxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm8.Create);
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SetT32("111110000101xxxx<<<<1100xxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm8.Create);
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SetT32("111110000101xxxx<<<<11x1xxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm8.Create);
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SetT32("111110000101xxxx<<<<11x1xxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm8.Create);
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SetT32("111110001101xxxxxxxxxxxxxxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm12.Create);
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SetT32("111110001101xxxxxxxxxxxxxxxxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemImm12.Create);
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SetT32("111110000101<<<<xxxx000000xxxxxx", InstName.Ldr, InstEmit32.Ldr, OpCodeT32MemRsImm.Create);
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SetT32("111110000001xxxx<<<<10x1xxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm8.Create);
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SetT32("111110000001xxxx<<<<10x1xxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm8.Create);
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SetT32("111110000001xxxx<<<<1100xxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm8.Create);
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SetT32("111110000001xxxx<<<<1100xxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm8.Create);
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SetT32("111110000001xxxx<<<<11x1xxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm8.Create);
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SetT32("111110000001xxxx<<<<11x1xxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm8.Create);
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SetT32("111110001001xxxxxxxxxxxxxxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm12.Create);
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SetT32("111110001001xxxxxxxxxxxxxxxxxxxx", InstName.Ldrb, InstEmit32.Ldrb, OpCodeT32MemImm12.Create);
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SetT32("1110100>x1>1<<<<xxxxxxxxxxxxxxxx", InstName.Ldrd, InstEmit32.Ldrd, OpCodeT32MemImm8D.Create);
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SetT32("111110000011xxxx<<<<10x1xxxxxxxx", InstName.Ldrh, InstEmit32.Ldrh, OpCodeT32MemImm8.Create);
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SetT32("111110000011xxxx<<<<10x1xxxxxxxx", InstName.Ldrh, InstEmit32.Ldrh, OpCodeT32MemImm8.Create);
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SetT32("111110000011xxxx<<<<1100xxxxxxxx", InstName.Ldrh, InstEmit32.Ldrh, OpCodeT32MemImm8.Create);
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SetT32("111110000011xxxx<<<<1100xxxxxxxx", InstName.Ldrh, InstEmit32.Ldrh, OpCodeT32MemImm8.Create);
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SetT32("111110000011xxxx<<<<11x1xxxxxxxx", InstName.Ldrh, InstEmit32.Ldrh, OpCodeT32MemImm8.Create);
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SetT32("111110000011xxxx<<<<11x1xxxxxxxx", InstName.Ldrh, InstEmit32.Ldrh, OpCodeT32MemImm8.Create);
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@ -1102,10 +1107,15 @@ namespace ARMeilleure.Decoders
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SetT32("11110x01110xxxxx0xxxxxxxxxxxxxxx", InstName.Rsb, InstEmit32.Rsb, OpCodeT32AluImm.Create);
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SetT32("11110x01110xxxxx0xxxxxxxxxxxxxxx", InstName.Rsb, InstEmit32.Rsb, OpCodeT32AluImm.Create);
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SetT32("11101011011xxxxx0xxxxxxxxxxxxxxx", InstName.Sbc, InstEmit32.Sbc, OpCodeT32AluRsImm.Create);
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SetT32("11101011011xxxxx0xxxxxxxxxxxxxxx", InstName.Sbc, InstEmit32.Sbc, OpCodeT32AluRsImm.Create);
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SetT32("11110x01011xxxxx0xxxxxxxxxxxxxxx", InstName.Sbc, InstEmit32.Sbc, OpCodeT32AluImm.Create);
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SetT32("11110x01011xxxxx0xxxxxxxxxxxxxxx", InstName.Sbc, InstEmit32.Sbc, OpCodeT32AluImm.Create);
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SetT32("111010001100xxxxxxxx11111110xxxx", InstName.Stlex, InstEmit32.Stlex, OpCodeT32MemStEx.Create);
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SetT32("1110100010x0xxxx0xxxxxxxxxxxxxxx", InstName.Stm, InstEmit32.Stm, OpCodeT32MemMult.Create);
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SetT32("1110100100x0xxxx0xxxxxxxxxxxxxxx", InstName.Stm, InstEmit32.Stm, OpCodeT32MemMult.Create);
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SetT32("111110000100xxxxxxxx1<<>xxxxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemImm8.Create);
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SetT32("111110000100xxxxxxxx1<<>xxxxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemImm8.Create);
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SetT32("111110001100xxxxxxxxxxxxxxxxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemImm12.Create);
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SetT32("111110001100xxxxxxxxxxxxxxxxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemImm12.Create);
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SetT32("111110000100<<<<xxxx000000xxxxxx", InstName.Str, InstEmit32.Str, OpCodeT32MemRsImm.Create);
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SetT32("111110000000xxxxxxxx1<<>xxxxxxxx", InstName.Strb, InstEmit32.Strb, OpCodeT32MemImm8.Create);
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SetT32("111110000000xxxxxxxx1<<>xxxxxxxx", InstName.Strb, InstEmit32.Strb, OpCodeT32MemImm8.Create);
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SetT32("111110001000xxxxxxxxxxxxxxxxxxxx", InstName.Strb, InstEmit32.Strb, OpCodeT32MemImm12.Create);
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SetT32("111110001000xxxxxxxxxxxxxxxxxxxx", InstName.Strb, InstEmit32.Strb, OpCodeT32MemImm12.Create);
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SetT32("1110100>x1>0<<<<xxxxxxxxxxxxxxxx", InstName.Strd, InstEmit32.Strd, OpCodeT32MemImm8D.Create);
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SetT32("111110000010xxxxxxxx1<<>xxxxxxxx", InstName.Strh, InstEmit32.Strh, OpCodeT32MemImm8.Create);
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SetT32("111110000010xxxxxxxx1<<>xxxxxxxx", InstName.Strh, InstEmit32.Strh, OpCodeT32MemImm8.Create);
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SetT32("111110001010xxxxxxxxxxxxxxxxxxxx", InstName.Strh, InstEmit32.Strh, OpCodeT32MemImm12.Create);
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SetT32("111110001010xxxxxxxxxxxxxxxxxxxx", InstName.Strh, InstEmit32.Strh, OpCodeT32MemImm12.Create);
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SetT32("11101011101<xxxx0xxx<<<<xxxxxxxx", InstName.Sub, InstEmit32.Sub, OpCodeT32AluRsImm.Create);
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SetT32("11101011101<xxxx0xxx<<<<xxxxxxxx", InstName.Sub, InstEmit32.Sub, OpCodeT32AluRsImm.Create);
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@ -88,7 +88,7 @@ namespace ARMeilleure.Instructions
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{
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{
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OpCodeT16BImmCmp op = (OpCodeT16BImmCmp)context.CurrOp;
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OpCodeT16BImmCmp op = (OpCodeT16BImmCmp)context.CurrOp;
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Operand value = GetIntOrZR(context, op.Rn);
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Operand value = GetIntA32(context, op.Rn);
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Operand lblTarget = context.GetLabel((ulong)op.Immediate);
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Operand lblTarget = context.GetLabel((ulong)op.Immediate);
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if (onNotZero)
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if (onNotZero)
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@ -547,7 +547,7 @@ namespace ARMeilleure.Instructions
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{
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{
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switch (context.CurrOp)
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switch (context.CurrOp)
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{
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{
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case OpCode32MemRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
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case IOpCode32MemRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
|
||||||
|
|
||||||
case IOpCode32MemReg op: return GetIntA32(context, op.Rm);
|
case IOpCode32MemReg op: return GetIntA32(context, op.Rm);
|
||||||
|
|
||||||
|
@ -564,7 +564,7 @@ namespace ARMeilleure.Instructions
|
||||||
return new InvalidOperationException($"Invalid OpCode type \"{opCode?.GetType().Name ?? "null"}\".");
|
return new InvalidOperationException($"Invalid OpCode type \"{opCode?.GetType().Name ?? "null"}\".");
|
||||||
}
|
}
|
||||||
|
|
||||||
public static Operand GetMShiftedByImmediate(ArmEmitterContext context, OpCode32MemRsImm op, bool setCarry)
|
public static Operand GetMShiftedByImmediate(ArmEmitterContext context, IOpCode32MemRsImm op, bool setCarry)
|
||||||
{
|
{
|
||||||
Operand m = GetIntA32(context, op.Rm);
|
Operand m = GetIntA32(context, op.Rm);
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue