Merry
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0f8f40486d
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ChocolArm64: More accurate implementation of Frecpe & Frecps (#228)
* ChocolArm64: More accurate implementation of Frecpe
* ChocolArm64: Handle infinities and zeros in Frecps
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2018-07-08 16:54:47 -03:00 |
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gdkchan
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741773910d
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Add SMAXP, SMINP, UMAX, UMAXP, UMIN and UMINP cpu instructions (#200)
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2018-07-03 03:31:48 -03:00 |
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LDj3SNuD
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c228cf320d
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Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdLogical.cs
* Update AVectorHelper.cs
* Update ASoftFallback.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Improve CountSetBits8() algorithm.
* Improve CountSetBits8() algorithm.
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2018-07-03 03:31:16 -03:00 |
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LDj3SNuD
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53934e8872
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Add Saba_V, Sabal_V, Sabd_V, Sabdl_V, Uaba_V, Uabal_V; Update Uabd_V, Uabdl_V. Add 16 tests. (#204)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdHelper.cs
* Update Instructions.cs
* Update CpuTest.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
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2018-06-30 12:40:41 -03:00 |
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gdkchan
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bc26aa558a
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Add support for the FMLA (by element/scalar) instruction (#187)
* Add support for the FMLA (by element/scalar) instruction
* Fix encoding
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2018-06-28 20:51:38 -03:00 |
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LDj3SNuD
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c818093528
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Add Sqxtun_S, Sqxtun_V with 3 tests. (#188)
* Update AInstEmitSimdArithmetic.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
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2018-06-25 23:36:20 -03:00 |
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LDj3SNuD
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8f6387128a
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Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
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2018-06-25 22:32:29 -03:00 |
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Rygnus
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0bec9d8439
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Add opcodes SQXTUN_S and SQXTUN_V (#184)
* Add SQXTUN_S and SQXTUN_V
Part 1/2 of commit
* Add SQXTUN_S and SQXTUN_V (2/2)
Part 2/2 of commit
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2018-06-25 14:23:46 -03:00 |
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gdkchan
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b747b23607
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Add the FADDP (scalar) instruction
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2018-06-18 00:41:28 -03:00 |
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Lordmau5
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46dc89f8dd
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Implement Fabs_V (#146)
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2018-06-12 09:29:16 -03:00 |
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gdkchan
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f9f111bc85
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Add intrinsics support (#121)
* Initial intrinsics support
* Update tests to work with the new Vector128 type and intrinsics
* Drop SSE4.1 requirement
* Fix copy-paste mistake
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2018-05-11 20:10:27 -03:00 |
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LDj3SNuD
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7cda630aba
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Add Sqxtn_S, Sqxtn_V, Uqxtn_S, Uqxtn_V instructions and Tests (6). (#110)
* Update ILGeneratorEx.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Update CpuTest.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdArithmetic.cs
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2018-04-29 20:39:58 -03:00 |
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LDj3SNuD
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a5ad1e9a06
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Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104)
* Update AOpCodeTable.cs
* Update AInstEmitSimdLogical.cs
* Update AInstEmitSimdArithmetic.cs
* Update ASoftFallback.cs
* Update AInstEmitAlu.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimdReg.cs
* Update CpuTestSimd.cs
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2018-04-25 23:20:22 -03:00 |
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LDj3SNuD
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2ccd995cb2
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Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update Bits.cs
* Create CpuTestSimd.cs
* Create CpuTestSimdReg.cs
* Update CpuTestSimd.cs
Provide a better supply of input values for the 20 Simd Tests.
* Update CpuTestSimdReg.cs
Provide a better supply of input values for the 20 Simd Tests.
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
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2018-04-20 12:40:15 -03:00 |
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MS-DOS1999
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76a5972378
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Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89)
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2018-04-19 00:22:12 -03:00 |
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LDj3SNuD
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8b75080639
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Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AOpCodeTable.cs
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2018-04-18 10:56:27 -03:00 |
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LDj3SNuD
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7acd0e0122
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Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdHelper.cs
* Update CpuTestSimdArithmetic.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
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2018-04-08 16:08:57 -03:00 |
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gdkchan
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df3cbadceb
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Fix FRSQRTS and FCM* (scalar) instructions
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2018-04-06 10:20:17 -03:00 |
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gdkchan
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36d9130592
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Add FMLS (vector) instruction
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2018-04-06 01:41:54 -03:00 |
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gdkchan
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f15b1c76a1
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Add FRSQRTS and FCM* instructions
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2018-04-05 23:28:12 -03:00 |
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Merry
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39f20d8d1a
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Implement Frsqrte_S (#72)
* Implement Frsqrte_S
* Implement Frsqrte_V
* Add Frsqrte_S test
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2018-04-05 20:36:19 -03:00 |
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gdkchan
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45c078d782
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Add Faddp (vector) instruction
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2018-04-04 22:13:10 -03:00 |
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gdkchan
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7fe12ad169
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Add FNEG (vector) instruction
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2018-04-04 16:36:07 -03:00 |
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gdkchan
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916540ff41
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Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction)
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2018-03-30 17:37:31 -03:00 |
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gdkchan
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19b8344568
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Add UABD instruction
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2018-03-30 16:30:23 -03:00 |
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gdkchan
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ba43af5765
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Add UABDL instruction
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2018-03-30 16:16:16 -03:00 |
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gdkchan
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f42f39fd90
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Add UADDL instruction
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2018-03-30 15:55:28 -03:00 |
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gdkchan
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9b6fa1f89e
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Add UHADD instruction
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2018-03-30 12:37:07 -03:00 |
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gdkchan
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b2549d83bf
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Add FNMADD instruction
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2018-03-24 00:28:23 -03:00 |
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MS-DOS1999
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ca6cf1cc90
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Add Frint Instructions and Tests (#62)
* add 'ADC 32bit and Overflow' test
* Add WZR/WSP tests
* fix ADC and ADDS
* add ADCS test
* add SBCS test
* indent my code and delete comment
* '/' <- i hate you x)
* remove spacebar char
* remove false tab
* add frintx_S test
* update frintx_S test
* add ASRV test
* fix new line
* fix PR
* fix indent
* Add add_V tests
* work on Frintx_V
* Add Frintx_V Instruction
* add some instruction and test
* Syntax + indent
* Delete Console Write
* Delete Console Write 2
* CR del
* Skip NaNs tests
* Skip NaNs tests 2
* Fix errors 1
* Fix errors 2
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2018-03-23 07:40:23 -03:00 |
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gdkchan
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88c6160c62
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Add MLA (vector by element), fixes some cases of MUL (vector by element)?
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2018-03-15 22:36:47 -03:00 |
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gdkchan
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30bcb8da33
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Add FRINTM (vector) instruction
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2018-03-09 23:41:05 -03:00 |
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gdkchan
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be0e4007dc
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Add SMLAL (vector), fix EXT instruction
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2018-03-06 21:36:49 -03:00 |
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gdkchan
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59d1b2ad83
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Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
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2018-03-05 16:18:37 -03:00 |
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gdkchan
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f39a864050
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Add EXT, CMTST (vector) and UMULL (vector) instructions
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2018-03-02 19:23:38 -03:00 |
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gdkchan
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31b35a9645
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Add FABD (scalar), ADCS, SBCS instructions, update config with better default control mappings, update readme with the new mappings
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2018-02-24 18:47:08 -03:00 |
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gdkchan
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035efc913e
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Fix cpu issue with cmp optimization, add HINT and FRINTX (scalar) instructions, fix for NvFlinger sometimes missing free buffers
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2018-02-24 11:19:28 -03:00 |
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gdkchan
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2cba1d49f6
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Add FRINTP instruction, fix opcode ctor call method creation with multithreading
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2018-02-22 16:26:11 -03:00 |
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emmauss
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62b827f474
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Split main project into core,graphics and chocolarm4 subproject (#29)
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2018-02-20 17:09:23 -03:00 |
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