merry
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7b35ebc64a
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T32: Implement ALU (shifted register) instructions (#3135)
* T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register)
* OpCodeTable: Sort T32 list
* Tests: Rename RandomTestCase to PrecomputedThumbTestCase
* T32: Tests for AluRsImm instructions
* fix nit
* fix nit 2
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2022-02-22 19:11:28 -03:00 |
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