* Implement JIT Arm64 backend
* PPTC version bump
* Address some feedback from Arm64 JIT PR
* Address even more PR feedback
* Remove unused IsPageAligned function
* Sync Qc flag before calls
* Fix comment and remove unused enum
* Address riperiperi PR feedback
* Delete Breakpoint IR instruction that was only implemented for Arm64
* Initial cache memory allocator implementation
* Get rid of CallFlag
* Perform cache cleanup on exit
* Basic cache invalidation
* Thats not how conditionals works in C# it seems
* Set PTC version to PR number
* Address PR feedback
* Update InstEmitFlowHelper.cs
* Flag clear on address is no longer needed
* Do not include exit block in function size calculation
* Dispose jump table
* For future use
* InternalVersion = 1519 (force retest).
Co-authored-by: LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>
* Implement a new physical memory manager and replace DeviceMemory
* Proper generic constraints
* Fix debug build
* Add memory tests
* New CPU memory manager and general code cleanup
* Remove host memory management from CPU project, use Ryujinx.Memory instead
* Fix tests
* Document exceptions on MemoryBlock
* Fix leak on unix memory allocation
* Proper disposal of some objects on tests
* Fix JitCache not being set as initialized
* GetRef without checks for 8-bits and 16-bits CAS
* Add MemoryBlock destructor
* Throw in separate method to improve codegen
* Address PR feedback
* QueryModified improvements
* Fix memory write tracking not marking all pages as modified in some cases
* Simplify MarkRegionAsModified
* Remove XML doc for ghost param
* Add back optimization to avoid useless buffer updates
* Add Ryujinx.Cpu project, move MemoryManager there and remove MemoryBlockWrapper
* Some nits
* Do not perform address translation when size is 0
* Address PR feedback and format NativeInterface class
* Remove ghost parameter description
* Update Ryujinx.Cpu to .NET Core 3.1
* Address PR feedback
* Fix build
* Return a well defined value for GetPhysicalAddress with invalid VA, and do not return unmapped ranges as modified
* Typo
* Implement Jump Table for Native Calls
NOTE: this slows down rejit considerably! Not recommended to be used
without codegen optimisation or AOT.
- Does not work on Linux
- A32 needs an additional commit.
* A32 Support
(WIP)
* Actually write Direct Call pointers to the table
That would help.
* Direct Calls: Rather than returning to the translator, attempt to keep within the native stack frame.
A return to the translator can still happen, but only by exceptionally
bubbling up to it.
Also:
- Always translate lowCq as a function. Faster interop with the direct
jumps, and this will be useful in future if we want to do speculative
translation.
- Tail Call Detection: after the decoding stage, detect if we do a tail
call, and avoid translating into it. Detected if a jump is made to an
address outwith the contiguous sequence of blocks surrounding the entry
point. The goal is to reduce code touched by jit and rejit.
* A32 Support
* Use smaller max function size for lowCq, fix exceptional returns
When a return has an unexpected value and there is no code block
following this one, we now return the value rather than continuing.
* CompareAndSwap (buggy)
* Ensure CompareAndSwap does not get optimized away.
* Use CompareAndSwap to make the dynamic table thread safe.
* Tail call for linux, throw on too many arguments.
* Combine CompareAndSwap 128 and 32/64.
They emit different IR instructions since their PreAllocator behaviour
is different, but now they just have one function on EmitterContext.
* Fix issues separating from optimisations.
* Use a stub to find and execute missing functions.
This allows us to skip doing many runtime comparisons and branches, and reduces the amount of code we need to emit significantly.
For the indirect call table, this stub also does the work of moving in the highCq address to the table when one is found.
* Make Jump Tables and Jit Cache dynmically resize
Reserve virtual memory, commit as needed.
* Move TailCallRemover to its own class.
* Multithreaded Translation (based on heuristic)
A poor one, at that. Need to get core count for a better one, which
means a lot of OS specific garbage.
* Better priority management for background threads.
* Bound core limit a bit more
Past a certain point the load is not paralellizable and starts stealing from the main thread. Likely due to GC, memory, heap allocation thread contention. Reduce by one core til optimisations come to improve the situation.
* Fix memory management on linux.
* Temporary solution to some sync problems.
This will make sure threads exit correctly, most of the time. There is a potential race where setting the sync counter to 0 does nothing (counter stays at what it was before, thread could take too long to exit), but we need to find a better way to do this anyways. Synchronization frequency has been tightened as we never enter blockwise segments of code. Essentially this means, check every x functions or loop iterations, before lowcq blocks existed and were worth just as much. Ideally it should be done in a better way, since functions can be anywhere from 1 to 5000 instructions. (maybe based on host timer, or an interrupt flag from a scheduler thread)
* Address feedback minus CompareAndSwap change.
* Use default ReservedRegion granularity.
* Merge CompareAndSwap with its V128 variant.
* We already got the source, no need to do it again.
* Make sure all background translation threads exit.
* Fix CompareAndSwap128
Detection criteria was a bit scuffed.
* Address Comments.
