mirror of
https://github.com/Ryujinx/Ryujinx.git
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e9848339dd
* dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Fix new dotnet-format issues after rebase * Address review comments * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Format if-blocks correctly * Run dotnet format after rebase and remove unused usings - analyzers - style - whitespace * Add comments to disabled warnings * Simplify properties and array initialization, Use const when possible, Remove trailing commas * cpu tests: Disable CA2211 for CodeBaseAddress and DataBaseAddress * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * Apply suggestions from code review Co-authored-by: Ac_K <Acoustik666@gmail.com> * First dotnet format pass * Fix naming rule violations * Remove naming rule violation exceptions * Fix comment style * Use targeted new * Remove redundant code * Remove comment alignment * Remove naming rule exceptions * Add trailing commas * Use nameof expression * Reformat to add remaining trailing commas --------- Co-authored-by: Ac_K <Acoustik666@gmail.com>
195 lines
8.1 KiB
C#
195 lines
8.1 KiB
C#
#define SimdRegElem
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using ARMeilleure.State;
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using NUnit.Framework;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("SimdRegElem")]
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public sealed class CpuTestSimdRegElem : CpuTest
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{
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#if SimdRegElem
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#region "ValueSource (Types)"
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private static ulong[] _2S_()
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{
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return new[] {
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0x0000000000000000ul, 0x7FFFFFFF7FFFFFFFul,
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0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul,
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};
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}
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private static ulong[] _4H_()
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{
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return new[] {
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0x0000000000000000ul, 0x7FFF7FFF7FFF7FFFul,
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0x8000800080008000ul, 0xFFFFFFFFFFFFFFFFul,
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};
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}
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#endregion
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#region "ValueSource (Opcodes)"
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private static uint[] _Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H_()
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{
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return new[]
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{
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0x2F400000u, // MLA V0.4H, V0.4H, V0.H[0]
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0x2F404000u, // MLS V0.4H, V0.4H, V0.H[0]
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0x0F408000u, // MUL V0.4H, V0.4H, V0.H[0]
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0x0F40C000u, // SQDMULH V0.4H, V0.4H, V0.H[0]
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0x0F40D000u, // SQRDMULH V0.4H, V0.4H, V0.H[0]
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};
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}
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private static uint[] _Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S_()
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{
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return new[]
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{
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0x2F800000u, // MLA V0.2S, V0.2S, V0.S[0]
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0x2F804000u, // MLS V0.2S, V0.2S, V0.S[0]
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0x0F808000u, // MUL V0.2S, V0.2S, V0.S[0]
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0x0F80C000u, // SQDMULH V0.2S, V0.2S, V0.S[0]
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0x0F80D000u, // SQRDMULH V0.2S, V0.2S, V0.S[0]
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};
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}
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private static uint[] _SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S_()
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{
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return new[]
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{
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0x0F402000u, // SMLAL V0.4S, V0.4H, V0.H[0]
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0x0F406000u, // SMLSL V0.4S, V0.4H, V0.H[0]
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0x0F40A000u, // SMULL V0.4S, V0.4H, V0.H[0]
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0x2F402000u, // UMLAL V0.4S, V0.4H, V0.H[0]
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0x2F406000u, // UMLSL V0.4S, V0.4H, V0.H[0]
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0x2F40A000u, // UMULL V0.4S, V0.4H, V0.H[0]
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};
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}
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private static uint[] _SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D_()
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{
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return new[]
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{
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0x0F802000u, // SMLAL V0.2D, V0.2S, V0.S[0]
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0x0F806000u, // SMLSL V0.2D, V0.2S, V0.S[0]
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0x0F80A000u, // SMULL V0.2D, V0.2S, V0.S[0]
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0x2F802000u, // UMLAL V0.2D, V0.2S, V0.S[0]
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0x2F806000u, // UMLSL V0.2D, V0.2S, V0.S[0]
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0x2F80A000u, // UMULL V0.2D, V0.2S, V0.S[0]
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};
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}
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#endregion
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[Test, Pairwise]
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public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H([ValueSource(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H_))] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource(nameof(_4H_))] ulong z,
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[ValueSource(nameof(_4H_))] ulong a,
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[ValueSource(nameof(_4H_))] ulong b,
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[Values(0u, 7u)] uint index,
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[Values(0b0u, 0b1u)] uint q) // <4H, 8H>
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{
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uint h = (index >> 2) & 1;
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uint l = (index >> 1) & 1;
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uint m = index & 1;
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opcodes |= ((rm & 15) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= (l << 21) | (m << 20) | (h << 11);
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opcodes |= ((q & 1) << 30);
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V128 v0 = MakeVectorE0E1(z, z);
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V128 v1 = MakeVectorE0E1(a, a * q);
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V128 v2 = MakeVectorE0E1(b, b * h);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
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}
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[Test, Pairwise]
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public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S([ValueSource(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_2S_4S_))] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource(nameof(_2S_))] ulong z,
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[ValueSource(nameof(_2S_))] ulong a,
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[ValueSource(nameof(_2S_))] ulong b,
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[Values(0u, 1u, 2u, 3u)] uint index,
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[Values(0b0u, 0b1u)] uint q) // <2S, 4S>
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{
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uint h = (index >> 1) & 1;
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uint l = index & 1;
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opcodes |= ((rm & 15) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= (l << 21) | (h << 11);
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opcodes |= ((q & 1) << 30);
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V128 v0 = MakeVectorE0E1(z, z);
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V128 v1 = MakeVectorE0E1(a, a * q);
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V128 v2 = MakeVectorE0E1(b, b * h);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn(fpsrMask: Fpsr.Qc);
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}
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[Test, Pairwise]
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public void SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S([ValueSource(nameof(_SU_Mlal_Mlsl_Mull_Ve_4H4S_8H4S_))] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource(nameof(_4H_))] ulong z,
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[ValueSource(nameof(_4H_))] ulong a,
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[ValueSource(nameof(_4H_))] ulong b,
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[Values(0u, 7u)] uint index,
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[Values(0b0u, 0b1u)] uint q) // <4H4S, 8H4S>
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{
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uint h = (index >> 2) & 1;
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uint l = (index >> 1) & 1;
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uint m = index & 1;
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opcodes |= ((rm & 15) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= (l << 21) | (m << 20) | (h << 11);
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opcodes |= ((q & 1) << 30);
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V128 v0 = MakeVectorE0E1(z, z);
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V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul);
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V128 v2 = MakeVectorE0E1(b, b * h);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D([ValueSource(nameof(_SU_Mlal_Mlsl_Mull_Ve_2S2D_4S2D_))] uint opcodes,
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[Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource(nameof(_2S_))] ulong z,
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[ValueSource(nameof(_2S_))] ulong a,
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[ValueSource(nameof(_2S_))] ulong b,
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[Values(0u, 1u, 2u, 3u)] uint index,
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[Values(0b0u, 0b1u)] uint q) // <2S2D, 4S2D>
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{
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uint h = (index >> 1) & 1;
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uint l = index & 1;
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opcodes |= ((rm & 15) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcodes |= (l << 21) | (h << 11);
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opcodes |= ((q & 1) << 30);
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V128 v0 = MakeVectorE0E1(z, z);
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V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul);
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V128 v2 = MakeVectorE0E1(b, b * h);
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SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn();
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}
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#endif
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}
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}
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