mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-23 23:52:01 +00:00
6b23a2c125
* Start implementing a new shader translator * Fix shift instructions and a typo * Small refactoring on StructuredProgram, move RemovePhis method to a separate class * Initial geometry shader support * Implement TLD4 * Fix -- There's no negation on FMUL32I * Add constant folding and algebraic simplification optimizations, nits * Some leftovers from constant folding * Avoid cast for constant assignments * Add a branch elimination pass, and misc small fixes * Remove redundant branches, add expression propagation and other improvements on the code * Small leftovers -- add missing break and continue, remove unused properties, other improvements * Add null check to handle empty block cases on block visitor * Add HADD2 and HMUL2 half float shader instructions * Optimize pack/unpack sequences, some fixes related to half float instructions * Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen * Fix copy paste mistake that caused RZ to be ignored on the AST instruction * Add workaround for conditional exit, and fix half float instruction with constant buffer * Add missing 0.0 source for TLDS.LZ variants * Simplify the switch for TLDS.LZ * Texture instructions related fixes * Implement the HFMA instruction, and some misc. fixes * Enable constant folding on UnpackHalf2x16 instructions * Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods * Remove the old shader translator * Remove ShaderDeclInfo and other unused things * Add dual vertex shader support * Add ShaderConfig, used to pass shader type and maximum cbuffer size * Move and rename some instruction enums * Move texture instructions into a separate file * Move operand GetExpression and locals management to OperandManager * Optimize opcode decoding using a simple list and binary search * Add missing condition for do-while on goto elimination * Misc. fixes on texture instructions * Simplify TLDS switch * Address PR feedback, and a nit
1178 lines
45 KiB
C#
1178 lines
45 KiB
C#
using Ryujinx.Common;
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using Ryujinx.Graphics.Gal;
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using Ryujinx.Graphics.Memory;
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using Ryujinx.Graphics.Shader;
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using Ryujinx.Graphics.Texture;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Graphics3d
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{
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class NvGpuEngine3d : INvGpuEngine
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{
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public int[] Registers { get; private set; }
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private NvGpu _gpu;
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private Dictionary<int, NvGpuMethod> _methods;
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private struct ConstBuffer
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{
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public bool Enabled;
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public long Position;
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public int Size;
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}
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private ConstBuffer[][] _constBuffers;
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// Viewport dimensions kept for scissor test limits
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private int _viewportX0 = 0;
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private int _viewportY0 = 0;
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private int _viewportX1 = 0;
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private int _viewportY1 = 0;
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private int _viewportWidth = 0;
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private int _viewportHeight = 0;
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private int _currentInstance = 0;
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public NvGpuEngine3d(NvGpu gpu)
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{
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_gpu = gpu;
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Registers = new int[0xe00];
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_methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int meth, int count, int stride, NvGpuMethod method)
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{
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while (count-- > 0)
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{
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_methods.Add(meth, method);
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meth += stride;
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}
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}
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AddMethod(0x585, 1, 1, VertexEndGl);
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AddMethod(0x674, 1, 1, ClearBuffers);
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AddMethod(0x6c3, 1, 1, QueryControl);
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AddMethod(0x8e4, 16, 1, CbData);
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AddMethod(0x904, 5, 8, CbBind);
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_constBuffers = new ConstBuffer[6][];
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for (int index = 0; index < _constBuffers.Length; index++)
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{
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_constBuffers[index] = new ConstBuffer[18];
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}
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//Ensure that all components are enabled by default.
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//FIXME: Is this correct?
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WriteRegister(NvGpuEngine3dReg.ColorMaskN, 0x1111);
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WriteRegister(NvGpuEngine3dReg.FrameBufferSrgb, 1);
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WriteRegister(NvGpuEngine3dReg.FrontFace, (int)GalFrontFace.Cw);
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for (int index = 0; index < GalPipelineState.RenderTargetsCount; index++)
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{
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WriteRegister(NvGpuEngine3dReg.IBlendNEquationRgb + index * 8, (int)GalBlendEquation.FuncAdd);
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WriteRegister(NvGpuEngine3dReg.IBlendNFuncSrcRgb + index * 8, (int)GalBlendFactor.One);
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WriteRegister(NvGpuEngine3dReg.IBlendNFuncDstRgb + index * 8, (int)GalBlendFactor.Zero);
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WriteRegister(NvGpuEngine3dReg.IBlendNEquationAlpha + index * 8, (int)GalBlendEquation.FuncAdd);
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WriteRegister(NvGpuEngine3dReg.IBlendNFuncSrcAlpha + index * 8, (int)GalBlendFactor.One);
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WriteRegister(NvGpuEngine3dReg.IBlendNFuncDstAlpha + index * 8, (int)GalBlendFactor.Zero);
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}
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}
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public void CallMethod(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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if (_methods.TryGetValue(methCall.Method, out NvGpuMethod method))
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{
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method(vmm, methCall);
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}
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else
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{
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WriteRegister(methCall);
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}
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}
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private void VertexEndGl(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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LockCaches();
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GalPipelineState state = new GalPipelineState();
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// Framebuffer must be run configured because viewport dimensions may be used in other methods
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SetFrameBuffer(state);
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for (int fbIndex = 0; fbIndex < 8; fbIndex++)
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{
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SetFrameBuffer(vmm, fbIndex);
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}
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SetFrontFace(state);
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SetCullFace(state);
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SetDepth(state);
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SetStencil(state);
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SetScissor(state);
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SetBlending(state);
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SetColorMask(state);
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SetPrimitiveRestart(state);
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SetZeta(vmm);
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SetRenderTargets();
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long[] keys = UploadShaders(vmm);
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_gpu.Renderer.Shader.BindProgram();
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UploadTextures(vmm, state, keys);
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UploadConstBuffers(vmm, state, keys);
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UploadVertexArrays(vmm, state);
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DispatchRender(vmm, state);
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UnlockCaches();
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}
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private void LockCaches()
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{
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_gpu.Renderer.Buffer.LockCache();
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_gpu.Renderer.Rasterizer.LockCaches();
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_gpu.Renderer.Texture.LockCache();
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}
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private void UnlockCaches()
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{
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_gpu.Renderer.Buffer.UnlockCache();
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_gpu.Renderer.Rasterizer.UnlockCaches();
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_gpu.Renderer.Texture.UnlockCache();
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}
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private void ClearBuffers(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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int attachment = (methCall.Argument >> 6) & 0xf;
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GalClearBufferFlags flags = (GalClearBufferFlags)(methCall.Argument & 0x3f);
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float red = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 0);
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float green = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 1);
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float blue = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 2);
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float alpha = ReadRegisterFloat(NvGpuEngine3dReg.ClearNColor + 3);
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float depth = ReadRegisterFloat(NvGpuEngine3dReg.ClearDepth);
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int stencil = ReadRegister(NvGpuEngine3dReg.ClearStencil);
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SetFrameBuffer(vmm, attachment);
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SetZeta(vmm);
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SetRenderTargets();
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_gpu.Renderer.RenderTarget.Bind();
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_gpu.Renderer.Rasterizer.ClearBuffers(flags, attachment, red, green, blue, alpha, depth, stencil);
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_gpu.Renderer.Pipeline.ResetDepthMask();
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_gpu.Renderer.Pipeline.ResetColorMask(attachment);
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}
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private void SetFrameBuffer(NvGpuVmm vmm, int fbIndex)
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{
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long va = MakeInt64From2xInt32(NvGpuEngine3dReg.FrameBufferNAddress + fbIndex * 0x10);
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int surfFormat = ReadRegister(NvGpuEngine3dReg.FrameBufferNFormat + fbIndex * 0x10);
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if (va == 0 || surfFormat == 0)
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{
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_gpu.Renderer.RenderTarget.UnbindColor(fbIndex);
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return;
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}
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long key = vmm.GetPhysicalAddress(va);
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int width = ReadRegister(NvGpuEngine3dReg.FrameBufferNWidth + fbIndex * 0x10);
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int height = ReadRegister(NvGpuEngine3dReg.FrameBufferNHeight + fbIndex * 0x10);
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int arrayMode = ReadRegister(NvGpuEngine3dReg.FrameBufferNArrayMode + fbIndex * 0x10);
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int layerCount = arrayMode & 0xFFFF;
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int layerStride = ReadRegister(NvGpuEngine3dReg.FrameBufferNLayerStride + fbIndex * 0x10);
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int baseLayer = ReadRegister(NvGpuEngine3dReg.FrameBufferNBaseLayer + fbIndex * 0x10);
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int blockDim = ReadRegister(NvGpuEngine3dReg.FrameBufferNBlockDim + fbIndex * 0x10);
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int gobBlockHeight = 1 << ((blockDim >> 4) & 7);
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GalMemoryLayout layout = (GalMemoryLayout)((blockDim >> 12) & 1);
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float tx = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNTranslateX + fbIndex * 8);
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float ty = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNTranslateY + fbIndex * 8);
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float sx = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNScaleX + fbIndex * 8);
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float sy = ReadRegisterFloat(NvGpuEngine3dReg.ViewportNScaleY + fbIndex * 8);
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_viewportX0 = (int)MathF.Max(0, tx - MathF.Abs(sx));
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_viewportY0 = (int)MathF.Max(0, ty - MathF.Abs(sy));
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_viewportX1 = (int)(tx + MathF.Abs(sx));
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_viewportY1 = (int)(ty + MathF.Abs(sy));
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GalImageFormat format = ImageUtils.ConvertSurface((GalSurfaceFormat)surfFormat);
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GalImage image = new GalImage(width, height, 1, 1, 1, gobBlockHeight, 1, layout, format, GalTextureTarget.TwoD);
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_gpu.ResourceManager.SendColorBuffer(vmm, key, fbIndex, image);
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_gpu.Renderer.RenderTarget.SetViewport(fbIndex, _viewportX0, _viewportY0, _viewportX1 - _viewportX0, _viewportY1 - _viewportY0);
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}
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private void SetFrameBuffer(GalPipelineState state)
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{
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state.FramebufferSrgb = ReadRegisterBool(NvGpuEngine3dReg.FrameBufferSrgb);
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state.FlipX = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleX);
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state.FlipY = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleY);
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int screenYControl = ReadRegister(NvGpuEngine3dReg.ScreenYControl);
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bool negateY = (screenYControl & 1) != 0;
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if (negateY)
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{
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state.FlipY = -state.FlipY;
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}
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}
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private void SetZeta(NvGpuVmm vmm)
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{
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long va = MakeInt64From2xInt32(NvGpuEngine3dReg.ZetaAddress);
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int zetaFormat = ReadRegister(NvGpuEngine3dReg.ZetaFormat);
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int blockDim = ReadRegister(NvGpuEngine3dReg.ZetaBlockDimensions);
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int gobBlockHeight = 1 << ((blockDim >> 4) & 7);
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GalMemoryLayout layout = (GalMemoryLayout)((blockDim >> 12) & 1); //?
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bool zetaEnable = ReadRegisterBool(NvGpuEngine3dReg.ZetaEnable);
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if (va == 0 || zetaFormat == 0 || !zetaEnable)
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{
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_gpu.Renderer.RenderTarget.UnbindZeta();
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return;
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}
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long key = vmm.GetPhysicalAddress(va);
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int width = ReadRegister(NvGpuEngine3dReg.ZetaHoriz);
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int height = ReadRegister(NvGpuEngine3dReg.ZetaVert);
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GalImageFormat format = ImageUtils.ConvertZeta((GalZetaFormat)zetaFormat);
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// TODO: Support non 2D?
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GalImage image = new GalImage(width, height, 1, 1, 1, gobBlockHeight, 1, layout, format, GalTextureTarget.TwoD);
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_gpu.ResourceManager.SendZetaBuffer(vmm, key, image);
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}
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private long[] UploadShaders(NvGpuVmm vmm)
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{
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long[] keys = new long[5];
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long basePosition = MakeInt64From2xInt32(NvGpuEngine3dReg.ShaderAddress);
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int index = 1;
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int vpAControl = ReadRegister(NvGpuEngine3dReg.ShaderNControl);
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bool vpAEnable = (vpAControl & 1) != 0;
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if (vpAEnable)
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{
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//Note: The maxwell supports 2 vertex programs, usually
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//only VP B is used, but in some cases VP A is also used.
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//In this case, it seems to function as an extra vertex
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//shader stage.
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//The graphics abstraction layer has a special overload for this
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//case, which should merge the two shaders into one vertex shader.
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int vpAOffset = ReadRegister(NvGpuEngine3dReg.ShaderNOffset);
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int vpBOffset = ReadRegister(NvGpuEngine3dReg.ShaderNOffset + 0x10);
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long vpAPos = basePosition + (uint)vpAOffset;
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long vpBPos = basePosition + (uint)vpBOffset;
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keys[(int)GalShaderType.Vertex] = vpBPos;
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_gpu.Renderer.Shader.Create(vmm, vpAPos, vpBPos, GalShaderType.Vertex);
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_gpu.Renderer.Shader.Bind(vpBPos);
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index = 2;
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}
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for (; index < 6; index++)
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{
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GalShaderType type = GetTypeFromProgram(index);
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int control = ReadRegister(NvGpuEngine3dReg.ShaderNControl + index * 0x10);
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int offset = ReadRegister(NvGpuEngine3dReg.ShaderNOffset + index * 0x10);
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//Note: Vertex Program (B) is always enabled.
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bool enable = (control & 1) != 0 || index == 1;
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if (!enable)
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{
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_gpu.Renderer.Shader.Unbind(type);
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continue;
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}
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long key = basePosition + (uint)offset;
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keys[(int)type] = key;
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_gpu.Renderer.Shader.Create(vmm, key, type);
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_gpu.Renderer.Shader.Bind(key);
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}
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return keys;
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}
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private static GalShaderType GetTypeFromProgram(int program)
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{
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switch (program)
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{
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case 0:
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case 1: return GalShaderType.Vertex;
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case 2: return GalShaderType.TessControl;
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case 3: return GalShaderType.TessEvaluation;
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case 4: return GalShaderType.Geometry;
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case 5: return GalShaderType.Fragment;
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}
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throw new ArgumentOutOfRangeException(nameof(program));
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}
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private void SetFrontFace(GalPipelineState state)
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{
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float signX = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleX);
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float signY = GetFlipSign(NvGpuEngine3dReg.ViewportNScaleY);
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GalFrontFace frontFace = (GalFrontFace)ReadRegister(NvGpuEngine3dReg.FrontFace);
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//Flipping breaks facing. Flipping front facing too fixes it
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if (signX != signY)
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{
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switch (frontFace)
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{
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case GalFrontFace.Cw: frontFace = GalFrontFace.Ccw; break;
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case GalFrontFace.Ccw: frontFace = GalFrontFace.Cw; break;
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}
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}
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state.FrontFace = frontFace;
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}
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private void SetCullFace(GalPipelineState state)
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{
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state.CullFaceEnabled = ReadRegisterBool(NvGpuEngine3dReg.CullFaceEnable);
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if (state.CullFaceEnabled)
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{
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state.CullFace = (GalCullFace)ReadRegister(NvGpuEngine3dReg.CullFace);
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}
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}
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private void SetDepth(GalPipelineState state)
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{
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state.DepthTestEnabled = ReadRegisterBool(NvGpuEngine3dReg.DepthTestEnable);
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state.DepthWriteEnabled = ReadRegisterBool(NvGpuEngine3dReg.DepthWriteEnable);
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if (state.DepthTestEnabled)
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{
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state.DepthFunc = (GalComparisonOp)ReadRegister(NvGpuEngine3dReg.DepthTestFunction);
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}
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state.DepthRangeNear = ReadRegisterFloat(NvGpuEngine3dReg.DepthRangeNNear);
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state.DepthRangeFar = ReadRegisterFloat(NvGpuEngine3dReg.DepthRangeNFar);
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}
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private void SetStencil(GalPipelineState state)
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{
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state.StencilTestEnabled = ReadRegisterBool(NvGpuEngine3dReg.StencilEnable);
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if (state.StencilTestEnabled)
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{
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state.StencilBackFuncFunc = (GalComparisonOp)ReadRegister(NvGpuEngine3dReg.StencilBackFuncFunc);
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state.StencilBackFuncRef = ReadRegister(NvGpuEngine3dReg.StencilBackFuncRef);
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state.StencilBackFuncMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilBackFuncMask);
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state.StencilBackOpFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilBackOpFail);
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state.StencilBackOpZFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilBackOpZFail);
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state.StencilBackOpZPass = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilBackOpZPass);
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state.StencilBackMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilBackMask);
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state.StencilFrontFuncFunc = (GalComparisonOp)ReadRegister(NvGpuEngine3dReg.StencilFrontFuncFunc);
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state.StencilFrontFuncRef = ReadRegister(NvGpuEngine3dReg.StencilFrontFuncRef);
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state.StencilFrontFuncMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilFrontFuncMask);
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state.StencilFrontOpFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilFrontOpFail);
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state.StencilFrontOpZFail = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilFrontOpZFail);
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state.StencilFrontOpZPass = (GalStencilOp)ReadRegister(NvGpuEngine3dReg.StencilFrontOpZPass);
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state.StencilFrontMask = (uint)ReadRegister(NvGpuEngine3dReg.StencilFrontMask);
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}
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}
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private void SetScissor(GalPipelineState state)
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{
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int count = 0;
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for (int index = 0; index < GalPipelineState.RenderTargetsCount; index++)
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{
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state.ScissorTestEnabled[index] = ReadRegisterBool(NvGpuEngine3dReg.ScissorEnable + index * 4);
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if (state.ScissorTestEnabled[index])
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{
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uint scissorHorizontal = (uint)ReadRegister(NvGpuEngine3dReg.ScissorHorizontal + index * 4);
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uint scissorVertical = (uint)ReadRegister(NvGpuEngine3dReg.ScissorVertical + index * 4);
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int left = (int)(scissorHorizontal & 0xFFFF); // Left, lower 16 bits
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int right = (int)(scissorHorizontal >> 16); // Right, upper 16 bits
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int bottom = (int)(scissorVertical & 0xFFFF); // Bottom, lower 16 bits
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int top = (int)(scissorVertical >> 16); // Top, upper 16 bits
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int width = Math.Abs(right - left);
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int height = Math.Abs(top - bottom);
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// If the scissor test covers the whole possible viewport, i.e. uninitialized, disable scissor test
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if ((width > NvGpu.MaxViewportSize && height > NvGpu.MaxViewportSize) || width <= 0 || height <= 0)
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{
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state.ScissorTestEnabled[index] = false;
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continue;
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|
}
|
|
|
|
// Keep track of how many scissor tests are active.
|
|
// If only 1, and it's the first user should apply to all viewports
|
|
count++;
|
|
|
|
// Flip X
|
|
if (state.FlipX == -1)
|
|
{
|
|
left = _viewportX1 - (left - _viewportX0);
|
|
right = _viewportX1 - (right - _viewportX0);
|
|
}
|
|
|
|
// Ensure X is in the right order
|
|
if (left > right)
|
|
{
|
|
int temp = left;
|
|
left = right;
|
|
right = temp;
|
|
}
|
|
|
|
// Flip Y
|
|
if (state.FlipY == -1)
|
|
{
|
|
bottom = _viewportY1 - (bottom - _viewportY0);
|
|
top = _viewportY1 - (top - _viewportY0);
|
|
}
|
|
|
|
// Ensure Y is in the right order
|
|
if (bottom > top)
|
|
{
|
|
int temp = top;
|
|
top = bottom;
|
|
bottom = temp;
|
|
}
|
|
|
|
// Handle out of active viewport dimensions
|
|
left = Math.Clamp(left, _viewportX0, _viewportX1);
|
|
right = Math.Clamp(right, _viewportX0, _viewportX1);
|
|
top = Math.Clamp(top, _viewportY0, _viewportY1);
|
|
bottom = Math.Clamp(bottom, _viewportY0, _viewportY1);
|
|
|
|
// Save values to state
|
|
state.ScissorTestX[index] = left;
|
|
state.ScissorTestY[index] = bottom;
|
|
|
|
state.ScissorTestWidth[index] = right - left;
|
|
state.ScissorTestHeight[index] = top - bottom;
|
|
}
|
|
}
|
|
|
|
state.ScissorTestCount = count;
|
|
}
|
|
|
|
private void SetBlending(GalPipelineState state)
|
|
{
|
|
bool blendIndependent = ReadRegisterBool(NvGpuEngine3dReg.BlendIndependent);
|
|
|
|
state.BlendIndependent = blendIndependent;
|
|
|
|
for (int index = 0; index < GalPipelineState.RenderTargetsCount; index++)
|
|
{
|
|
if (blendIndependent)
|
|
{
|
|
state.Blends[index].Enabled = ReadRegisterBool(NvGpuEngine3dReg.IBlendNEnable + index);
|
|
|
|
if (state.Blends[index].Enabled)
|
|
{
|
|
state.Blends[index].SeparateAlpha = ReadRegisterBool(NvGpuEngine3dReg.IBlendNSeparateAlpha + index * 8);
|
|
|
|
state.Blends[index].EquationRgb = ReadBlendEquation(NvGpuEngine3dReg.IBlendNEquationRgb + index * 8);
|
|
state.Blends[index].FuncSrcRgb = ReadBlendFactor (NvGpuEngine3dReg.IBlendNFuncSrcRgb + index * 8);
|
|
state.Blends[index].FuncDstRgb = ReadBlendFactor (NvGpuEngine3dReg.IBlendNFuncDstRgb + index * 8);
|
|
state.Blends[index].EquationAlpha = ReadBlendEquation(NvGpuEngine3dReg.IBlendNEquationAlpha + index * 8);
|
|
state.Blends[index].FuncSrcAlpha = ReadBlendFactor (NvGpuEngine3dReg.IBlendNFuncSrcAlpha + index * 8);
|
|
state.Blends[index].FuncDstAlpha = ReadBlendFactor (NvGpuEngine3dReg.IBlendNFuncDstAlpha + index * 8);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
//It seems that even when independent blend is disabled, the first IBlend enable
|
|
//register is still set to indicate whenever blend is enabled or not (?).
|
|
state.Blends[index].Enabled = ReadRegisterBool(NvGpuEngine3dReg.IBlendNEnable);
|
|
|
|
if (state.Blends[index].Enabled)
|
|
{
|
|
state.Blends[index].SeparateAlpha = ReadRegisterBool(NvGpuEngine3dReg.BlendSeparateAlpha);
|
|
|
|
state.Blends[index].EquationRgb = ReadBlendEquation(NvGpuEngine3dReg.BlendEquationRgb);
|
|
state.Blends[index].FuncSrcRgb = ReadBlendFactor (NvGpuEngine3dReg.BlendFuncSrcRgb);
|
|
state.Blends[index].FuncDstRgb = ReadBlendFactor (NvGpuEngine3dReg.BlendFuncDstRgb);
|
|
state.Blends[index].EquationAlpha = ReadBlendEquation(NvGpuEngine3dReg.BlendEquationAlpha);
|
|
state.Blends[index].FuncSrcAlpha = ReadBlendFactor (NvGpuEngine3dReg.BlendFuncSrcAlpha);
|
|
state.Blends[index].FuncDstAlpha = ReadBlendFactor (NvGpuEngine3dReg.BlendFuncDstAlpha);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
private GalBlendEquation ReadBlendEquation(NvGpuEngine3dReg register)
|
|
{
|
|
return (GalBlendEquation)ReadRegister(register);
|
|
}
|
|
|
|
private GalBlendFactor ReadBlendFactor(NvGpuEngine3dReg register)
|
|
{
|
|
return (GalBlendFactor)ReadRegister(register);
|
|
}
|
|
|
|
private void SetColorMask(GalPipelineState state)
|
|
{
|
|
bool colorMaskCommon = ReadRegisterBool(NvGpuEngine3dReg.ColorMaskCommon);
|
|
|
|
state.ColorMaskCommon = colorMaskCommon;
|
|
|
|
for (int index = 0; index < GalPipelineState.RenderTargetsCount; index++)
|
|
{
|
|
int colorMask = ReadRegister(NvGpuEngine3dReg.ColorMaskN + (colorMaskCommon ? 0 : index));
|
|
|
|
state.ColorMasks[index].Red = ((colorMask >> 0) & 0xf) != 0;
|
|
state.ColorMasks[index].Green = ((colorMask >> 4) & 0xf) != 0;
|
|
state.ColorMasks[index].Blue = ((colorMask >> 8) & 0xf) != 0;
|
|
state.ColorMasks[index].Alpha = ((colorMask >> 12) & 0xf) != 0;
|
|
}
|
|
}
|
|
|
|
private void SetPrimitiveRestart(GalPipelineState state)
|
|
{
|
|
state.PrimitiveRestartEnabled = ReadRegisterBool(NvGpuEngine3dReg.PrimRestartEnable);
|
|
|
|
if (state.PrimitiveRestartEnabled)
|
|
{
|
|
state.PrimitiveRestartIndex = (uint)ReadRegister(NvGpuEngine3dReg.PrimRestartIndex);
|
|
}
|
|
}
|
|
|
|
private void SetRenderTargets()
|
|
{
|
|
//Commercial games do not seem to
|
|
//bool SeparateFragData = ReadRegisterBool(NvGpuEngine3dReg.RTSeparateFragData);
|
|
|
|
uint control = (uint)(ReadRegister(NvGpuEngine3dReg.RtControl));
|
|
|
|
uint count = control & 0xf;
|
|
|
|
if (count > 0)
|
|
{
|
|
int[] map = new int[count];
|
|
|
|
for (int index = 0; index < count; index++)
|
|
{
|
|
int shift = 4 + index * 3;
|
|
|
|
map[index] = (int)((control >> shift) & 7);
|
|
}
|
|
|
|
_gpu.Renderer.RenderTarget.SetMap(map);
|
|
}
|
|
else
|
|
{
|
|
_gpu.Renderer.RenderTarget.SetMap(null);
|
|
}
|
|
}
|
|
|
|
private void UploadTextures(NvGpuVmm vmm, GalPipelineState state, long[] keys)
|
|
{
|
|
long baseShPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.ShaderAddress);
|
|
|
|
int textureCbIndex = ReadRegister(NvGpuEngine3dReg.TextureCbIndex);
|
|
|
|
List<(long, GalImage, GalTextureSampler)> unboundTextures = new List<(long, GalImage, GalTextureSampler)>();
|
|
|
|
for (int index = 0; index < keys.Length; index++)
|
|
{
|
|
foreach (TextureDescriptor desc in _gpu.Renderer.Shader.GetTextureUsage(keys[index]))
|
|
{
|
|
int textureHandle;
|
|
|
|
if (desc.IsBindless)
|
|
{
|
|
long position = _constBuffers[index][desc.CbufSlot].Position;
|
|
|
|
textureHandle = vmm.ReadInt32(position + desc.CbufOffset * 4);
|
|
}
|
|
else
|
|
{
|
|
long position = _constBuffers[index][textureCbIndex].Position;
|
|
|
|
textureHandle = vmm.ReadInt32(position + desc.HandleIndex * 4);
|
|
}
|
|
|
|
unboundTextures.Add(UploadTexture(vmm, textureHandle));
|
|
}
|
|
}
|
|
|
|
for (int index = 0; index < unboundTextures.Count; index++)
|
|
{
|
|
(long key, GalImage image, GalTextureSampler sampler) = unboundTextures[index];
|
|
|
|
if (key == 0)
|
|
{
|
|
continue;
|
|
}
|
|
|
|
_gpu.Renderer.Texture.Bind(key, index, image);
|
|
_gpu.Renderer.Texture.SetSampler(image, sampler);
|
|
}
|
|
}
|
|
|
|
private (long, GalImage, GalTextureSampler) UploadTexture(NvGpuVmm vmm, int textureHandle)
|
|
{
|
|
if (textureHandle == 0)
|
|
{
|
|
//FIXME: Some games like puyo puyo will use handles with the value 0.
|
|
//This is a bug, most likely caused by sync issues.
|
|
return (0, default(GalImage), default(GalTextureSampler));
|
|
}
|
|
|
|
bool linkedTsc = ReadRegisterBool(NvGpuEngine3dReg.LinkedTsc);
|
|
|
|
int ticIndex = (textureHandle >> 0) & 0xfffff;
|
|
|
|
int tscIndex = linkedTsc ? ticIndex : (textureHandle >> 20) & 0xfff;
|
|
|
|
long ticPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.TexHeaderPoolOffset);
|
|
long tscPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.TexSamplerPoolOffset);
|
|
|
|
ticPosition += ticIndex * 0x20;
|
|
tscPosition += tscIndex * 0x20;
|
|
|
|
GalImage image = TextureFactory.MakeTexture(vmm, ticPosition);
|
|
|
|
GalTextureSampler sampler = TextureFactory.MakeSampler(_gpu, vmm, tscPosition);
|
|
|
|
long key = vmm.ReadInt64(ticPosition + 4) & 0xffffffffffff;
|
|
|
|
if (image.Layout == GalMemoryLayout.BlockLinear)
|
|
{
|
|
key &= ~0x1ffL;
|
|
}
|
|
else if (image.Layout == GalMemoryLayout.Pitch)
|
|
{
|
|
key &= ~0x1fL;
|
|
}
|
|
|
|
key = vmm.GetPhysicalAddress(key);
|
|
|
|
if (key == -1)
|
|
{
|
|
//FIXME: Shouldn't ignore invalid addresses.
|
|
return (0, default(GalImage), default(GalTextureSampler));
|
|
}
|
|
|
|
_gpu.ResourceManager.SendTexture(vmm, key, image);
|
|
|
|
return (key, image, sampler);
|
|
}
|
|
|
|
private void UploadConstBuffers(NvGpuVmm vmm, GalPipelineState state, long[] keys)
|
|
{
|
|
for (int stage = 0; stage < keys.Length; stage++)
|
|
{
|
|
foreach (CBufferDescriptor desc in _gpu.Renderer.Shader.GetConstBufferUsage(keys[stage]))
|
|
{
|
|
ConstBuffer cb = _constBuffers[stage][desc.Slot];
|
|
|
|
if (!cb.Enabled)
|
|
{
|
|
continue;
|
|
}
|
|
|
|
long key = vmm.GetPhysicalAddress(cb.Position);
|
|
|
|
if (_gpu.ResourceManager.MemoryRegionModified(vmm, key, cb.Size, NvGpuBufferType.ConstBuffer))
|
|
{
|
|
if (vmm.TryGetHostAddress(cb.Position, cb.Size, out IntPtr cbPtr))
|
|
{
|
|
_gpu.Renderer.Buffer.SetData(key, cb.Size, cbPtr);
|
|
}
|
|
else
|
|
{
|
|
_gpu.Renderer.Buffer.SetData(key, vmm.ReadBytes(cb.Position, cb.Size));
|
|
}
|
|
}
|
|
|
|
state.ConstBufferKeys[stage][desc.Slot] = key;
|
|
}
|
|
}
|
|
}
|
|
|
|
private void UploadVertexArrays(NvGpuVmm vmm, GalPipelineState state)
|
|
{
|
|
long ibPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.IndexArrayAddress);
|
|
|
|
long iboKey = vmm.GetPhysicalAddress(ibPosition);
|
|
|
|
int indexEntryFmt = ReadRegister(NvGpuEngine3dReg.IndexArrayFormat);
|
|
int indexCount = ReadRegister(NvGpuEngine3dReg.IndexBatchCount);
|
|
int primCtrl = ReadRegister(NvGpuEngine3dReg.VertexBeginGl);
|
|
|
|
GalPrimitiveType primType = (GalPrimitiveType)(primCtrl & 0xffff);
|
|
|
|
GalIndexFormat indexFormat = (GalIndexFormat)indexEntryFmt;
|
|
|
|
int indexEntrySize = 1 << indexEntryFmt;
|
|
|
|
if (indexEntrySize > 4)
|
|
{
|
|
throw new InvalidOperationException("Invalid index entry size \"" + indexEntrySize + "\"!");
|
|
}
|
|
|
|
if (indexCount != 0)
|
|
{
|
|
int ibSize = indexCount * indexEntrySize;
|
|
|
|
bool iboCached = _gpu.Renderer.Rasterizer.IsIboCached(iboKey, (uint)ibSize);
|
|
|
|
bool usesLegacyQuads =
|
|
primType == GalPrimitiveType.Quads ||
|
|
primType == GalPrimitiveType.QuadStrip;
|
|
|
|
if (!iboCached || _gpu.ResourceManager.MemoryRegionModified(vmm, iboKey, (uint)ibSize, NvGpuBufferType.Index))
|
|
{
|
|
if (!usesLegacyQuads)
|
|
{
|
|
if (vmm.TryGetHostAddress(ibPosition, ibSize, out IntPtr ibPtr))
|
|
{
|
|
_gpu.Renderer.Rasterizer.CreateIbo(iboKey, ibSize, ibPtr);
|
|
}
|
|
else
|
|
{
|
|
_gpu.Renderer.Rasterizer.CreateIbo(iboKey, ibSize, vmm.ReadBytes(ibPosition, ibSize));
|
|
}
|
|
}
|
|
else
|
|
{
|
|
byte[] buffer = vmm.ReadBytes(ibPosition, ibSize);
|
|
|
|
if (primType == GalPrimitiveType.Quads)
|
|
{
|
|
buffer = QuadHelper.ConvertQuadsToTris(buffer, indexEntrySize, indexCount);
|
|
}
|
|
else /* if (PrimType == GalPrimitiveType.QuadStrip) */
|
|
{
|
|
buffer = QuadHelper.ConvertQuadStripToTris(buffer, indexEntrySize, indexCount);
|
|
}
|
|
|
|
_gpu.Renderer.Rasterizer.CreateIbo(iboKey, ibSize, buffer);
|
|
}
|
|
}
|
|
|
|
if (!usesLegacyQuads)
|
|
{
|
|
_gpu.Renderer.Rasterizer.SetIndexArray(ibSize, indexFormat);
|
|
}
|
|
else
|
|
{
|
|
if (primType == GalPrimitiveType.Quads)
|
|
{
|
|
_gpu.Renderer.Rasterizer.SetIndexArray(QuadHelper.ConvertSizeQuadsToTris(ibSize), indexFormat);
|
|
}
|
|
else /* if (PrimType == GalPrimitiveType.QuadStrip) */
|
|
{
|
|
_gpu.Renderer.Rasterizer.SetIndexArray(QuadHelper.ConvertSizeQuadStripToTris(ibSize), indexFormat);
|
|
}
|
|
}
|
|
}
|
|
|
|
List<GalVertexAttrib>[] attribs = new List<GalVertexAttrib>[32];
|
|
|
|
for (int attr = 0; attr < 16; attr++)
|
|
{
|
|
int packed = ReadRegister(NvGpuEngine3dReg.VertexAttribNFormat + attr);
|
|
|
|
int arrayIndex = packed & 0x1f;
|
|
|
|
if (attribs[arrayIndex] == null)
|
|
{
|
|
attribs[arrayIndex] = new List<GalVertexAttrib>();
|
|
}
|
|
|
|
long vbPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.VertexArrayNAddress + arrayIndex * 4);
|
|
|
|
if (vbPosition == 0)
|
|
{
|
|
continue;
|
|
}
|
|
|
|
bool isConst = ((packed >> 6) & 1) != 0;
|
|
|
|
int offset = (packed >> 7) & 0x3fff;
|
|
|
|
GalVertexAttribSize size = (GalVertexAttribSize)((packed >> 21) & 0x3f);
|
|
GalVertexAttribType type = (GalVertexAttribType)((packed >> 27) & 0x7);
|
|
|
|
bool isRgba = ((packed >> 31) & 1) != 0;
|
|
|
|
// Check vertex array is enabled to avoid out of bounds exception when reading bytes
|
|
bool enable = (ReadRegister(NvGpuEngine3dReg.VertexArrayNControl + arrayIndex * 4) & 0x1000) != 0;
|
|
|
|
//Note: 16 is the maximum size of an attribute,
|
|
//having a component size of 32-bits with 4 elements (a vec4).
|
|
if (enable)
|
|
{
|
|
byte[] data = vmm.ReadBytes(vbPosition + offset, 16);
|
|
|
|
attribs[arrayIndex].Add(new GalVertexAttrib(attr, isConst, offset, data, size, type, isRgba));
|
|
}
|
|
}
|
|
|
|
state.VertexBindings = new GalVertexBinding[32];
|
|
|
|
for (int index = 0; index < 32; index++)
|
|
{
|
|
if (attribs[index] == null)
|
|
{
|
|
continue;
|
|
}
|
|
|
|
int control = ReadRegister(NvGpuEngine3dReg.VertexArrayNControl + index * 4);
|
|
|
|
bool enable = (control & 0x1000) != 0;
|
|
|
|
if (!enable)
|
|
{
|
|
continue;
|
|
}
|
|
|
|
long vbPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.VertexArrayNAddress + index * 4);
|
|
long vbEndPos = MakeInt64From2xInt32(NvGpuEngine3dReg.VertexArrayNEndAddr + index * 2);
|
|
|
|
int vertexDivisor = ReadRegister(NvGpuEngine3dReg.VertexArrayNDivisor + index * 4);
|
|
|
|
bool instanced = ReadRegisterBool(NvGpuEngine3dReg.VertexArrayNInstance + index);
|
|
|
|
int stride = control & 0xfff;
|
|
|
|
if (instanced && vertexDivisor != 0)
|
|
{
|
|
vbPosition += stride * (_currentInstance / vertexDivisor);
|
|
}
|
|
|
|
if (vbPosition > vbEndPos)
|
|
{
|
|
//Instance is invalid, ignore the draw call
|
|
continue;
|
|
}
|
|
|
|
long vboKey = vmm.GetPhysicalAddress(vbPosition);
|
|
|
|
long vbSize = (vbEndPos - vbPosition) + 1;
|
|
int modifiedVbSize = (int)vbSize;
|
|
|
|
|
|
// If quads convert size to triangle length
|
|
if (stride == 0)
|
|
{
|
|
if (primType == GalPrimitiveType.Quads)
|
|
{
|
|
modifiedVbSize = QuadHelper.ConvertSizeQuadsToTris(modifiedVbSize);
|
|
}
|
|
else if (primType == GalPrimitiveType.QuadStrip)
|
|
{
|
|
modifiedVbSize = QuadHelper.ConvertSizeQuadStripToTris(modifiedVbSize);
|
|
}
|
|
}
|
|
|
|
bool vboCached = _gpu.Renderer.Rasterizer.IsVboCached(vboKey, modifiedVbSize);
|
|
|
|
if (!vboCached || _gpu.ResourceManager.MemoryRegionModified(vmm, vboKey, vbSize, NvGpuBufferType.Vertex))
|
|
{
|
|
if ((primType == GalPrimitiveType.Quads | primType == GalPrimitiveType.QuadStrip) && stride != 0)
|
|
{
|
|
// Convert quad buffer to triangles
|
|
byte[] data = vmm.ReadBytes(vbPosition, vbSize);
|
|
|
|
if (primType == GalPrimitiveType.Quads)
|
|
{
|
|
data = QuadHelper.ConvertQuadsToTris(data, stride, (int)(vbSize / stride));
|
|
}
|
|
else
|
|
{
|
|
data = QuadHelper.ConvertQuadStripToTris(data, stride, (int)(vbSize / stride));
|
|
}
|
|
_gpu.Renderer.Rasterizer.CreateVbo(vboKey, data);
|
|
}
|
|
else if (vmm.TryGetHostAddress(vbPosition, vbSize, out IntPtr vbPtr))
|
|
{
|
|
_gpu.Renderer.Rasterizer.CreateVbo(vboKey, (int)vbSize, vbPtr);
|
|
}
|
|
else
|
|
{
|
|
_gpu.Renderer.Rasterizer.CreateVbo(vboKey, vmm.ReadBytes(vbPosition, vbSize));
|
|
}
|
|
}
|
|
|
|
state.VertexBindings[index].Enabled = true;
|
|
state.VertexBindings[index].Stride = stride;
|
|
state.VertexBindings[index].VboKey = vboKey;
|
|
state.VertexBindings[index].Instanced = instanced;
|
|
state.VertexBindings[index].Divisor = vertexDivisor;
|
|
state.VertexBindings[index].Attribs = attribs[index].ToArray();
|
|
}
|
|
}
|
|
|
|
private void DispatchRender(NvGpuVmm vmm, GalPipelineState state)
|
|
{
|
|
int indexCount = ReadRegister(NvGpuEngine3dReg.IndexBatchCount);
|
|
int primCtrl = ReadRegister(NvGpuEngine3dReg.VertexBeginGl);
|
|
|
|
GalPrimitiveType primType = (GalPrimitiveType)(primCtrl & 0xffff);
|
|
|
|
bool instanceNext = ((primCtrl >> 26) & 1) != 0;
|
|
bool instanceCont = ((primCtrl >> 27) & 1) != 0;
|
|
|
|
if (instanceNext && instanceCont)
|
|
{
|
|
throw new InvalidOperationException("GPU tried to increase and reset instance count at the same time");
|
|
}
|
|
|
|
if (instanceNext)
|
|
{
|
|
_currentInstance++;
|
|
}
|
|
else if (!instanceCont)
|
|
{
|
|
_currentInstance = 0;
|
|
}
|
|
|
|
state.Instance = _currentInstance;
|
|
|
|
_gpu.Renderer.Pipeline.Bind(state);
|
|
|
|
_gpu.Renderer.RenderTarget.Bind();
|
|
|
|
if (indexCount != 0)
|
|
{
|
|
int indexEntryFmt = ReadRegister(NvGpuEngine3dReg.IndexArrayFormat);
|
|
int indexFirst = ReadRegister(NvGpuEngine3dReg.IndexBatchFirst);
|
|
int vertexBase = ReadRegister(NvGpuEngine3dReg.VertexArrayElemBase);
|
|
|
|
long indexPosition = MakeInt64From2xInt32(NvGpuEngine3dReg.IndexArrayAddress);
|
|
|
|
long iboKey = vmm.GetPhysicalAddress(indexPosition);
|
|
|
|
//Quad primitive types were deprecated on OpenGL 3.x,
|
|
//they are converted to a triangles index buffer on IB creation,
|
|
//so we should use the triangles type here too.
|
|
if (primType == GalPrimitiveType.Quads || primType == GalPrimitiveType.QuadStrip)
|
|
{
|
|
//Note: We assume that index first points to the first
|
|
//vertex of a quad, if it points to the middle of a
|
|
//quad (First % 4 != 0 for Quads) then it will not work properly.
|
|
if (primType == GalPrimitiveType.Quads)
|
|
{
|
|
indexFirst = QuadHelper.ConvertSizeQuadsToTris(indexFirst);
|
|
}
|
|
else // QuadStrip
|
|
{
|
|
indexFirst = QuadHelper.ConvertSizeQuadStripToTris(indexFirst);
|
|
}
|
|
|
|
primType = GalPrimitiveType.Triangles;
|
|
}
|
|
|
|
_gpu.Renderer.Rasterizer.DrawElements(iboKey, indexFirst, vertexBase, primType);
|
|
}
|
|
else
|
|
{
|
|
int vertexFirst = ReadRegister(NvGpuEngine3dReg.VertexArrayFirst);
|
|
int vertexCount = ReadRegister(NvGpuEngine3dReg.VertexArrayCount);
|
|
|
|
//Quad primitive types were deprecated on OpenGL 3.x,
|
|
//they are converted to a triangles index buffer on IB creation,
|
|
//so we should use the triangles type here too.
|
|
if (primType == GalPrimitiveType.Quads || primType == GalPrimitiveType.QuadStrip)
|
|
{
|
|
//Note: We assume that index first points to the first
|
|
//vertex of a quad, if it points to the middle of a
|
|
//quad (First % 4 != 0 for Quads) then it will not work properly.
|
|
if (primType == GalPrimitiveType.Quads)
|
|
{
|
|
vertexFirst = QuadHelper.ConvertSizeQuadsToTris(vertexFirst);
|
|
}
|
|
else // QuadStrip
|
|
{
|
|
vertexFirst = QuadHelper.ConvertSizeQuadStripToTris(vertexFirst);
|
|
}
|
|
|
|
primType = GalPrimitiveType.Triangles;
|
|
vertexCount = QuadHelper.ConvertSizeQuadsToTris(vertexCount);
|
|
}
|
|
|
|
_gpu.Renderer.Rasterizer.DrawArrays(vertexFirst, vertexCount, primType);
|
|
}
|
|
|
|
// Reset pipeline for host OpenGL calls
|
|
_gpu.Renderer.Pipeline.Unbind(state);
|
|
|
|
//Is the GPU really clearing those registers after draw?
|
|
WriteRegister(NvGpuEngine3dReg.IndexBatchFirst, 0);
|
|
WriteRegister(NvGpuEngine3dReg.IndexBatchCount, 0);
|
|
}
|
|
|
|
private enum QueryMode
|
|
{
|
|
WriteSeq,
|
|
Sync,
|
|
WriteCounterAndTimestamp
|
|
}
|
|
|
|
private void QueryControl(NvGpuVmm vmm, GpuMethodCall methCall)
|
|
{
|
|
WriteRegister(methCall);
|
|
|
|
long position = MakeInt64From2xInt32(NvGpuEngine3dReg.QueryAddress);
|
|
|
|
int seq = Registers[(int)NvGpuEngine3dReg.QuerySequence];
|
|
int ctrl = Registers[(int)NvGpuEngine3dReg.QueryControl];
|
|
|
|
QueryMode mode = (QueryMode)(ctrl & 3);
|
|
|
|
switch (mode)
|
|
{
|
|
case QueryMode.WriteSeq: vmm.WriteInt32(position, seq); break;
|
|
|
|
case QueryMode.WriteCounterAndTimestamp:
|
|
{
|
|
//TODO: Implement counters.
|
|
long counter = 1;
|
|
|
|
long timestamp = PerformanceCounter.ElapsedMilliseconds;
|
|
|
|
vmm.WriteInt64(position + 0, counter);
|
|
vmm.WriteInt64(position + 8, timestamp);
|
|
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
private void CbData(NvGpuVmm vmm, GpuMethodCall methCall)
|
|
{
|
|
long position = MakeInt64From2xInt32(NvGpuEngine3dReg.ConstBufferAddress);
|
|
|
|
int offset = ReadRegister(NvGpuEngine3dReg.ConstBufferOffset);
|
|
|
|
vmm.WriteInt32(position + offset, methCall.Argument);
|
|
|
|
WriteRegister(NvGpuEngine3dReg.ConstBufferOffset, offset + 4);
|
|
|
|
_gpu.ResourceManager.ClearPbCache(NvGpuBufferType.ConstBuffer);
|
|
}
|
|
|
|
private void CbBind(NvGpuVmm vmm, GpuMethodCall methCall)
|
|
{
|
|
int stage = (methCall.Method - 0x904) >> 3;
|
|
|
|
int index = methCall.Argument;
|
|
|
|
bool enabled = (index & 1) != 0;
|
|
|
|
index = (index >> 4) & 0x1f;
|
|
|
|
long position = MakeInt64From2xInt32(NvGpuEngine3dReg.ConstBufferAddress);
|
|
|
|
long cbKey = vmm.GetPhysicalAddress(position);
|
|
|
|
int size = ReadRegister(NvGpuEngine3dReg.ConstBufferSize);
|
|
|
|
if (!_gpu.Renderer.Buffer.IsCached(cbKey, size))
|
|
{
|
|
_gpu.Renderer.Buffer.Create(cbKey, size);
|
|
}
|
|
|
|
ConstBuffer cb = _constBuffers[stage][index];
|
|
|
|
if (cb.Position != position || cb.Enabled != enabled || cb.Size != size)
|
|
{
|
|
_constBuffers[stage][index].Position = position;
|
|
_constBuffers[stage][index].Enabled = enabled;
|
|
_constBuffers[stage][index].Size = size;
|
|
}
|
|
}
|
|
|
|
private float GetFlipSign(NvGpuEngine3dReg reg)
|
|
{
|
|
return MathF.Sign(ReadRegisterFloat(reg));
|
|
}
|
|
|
|
private long MakeInt64From2xInt32(NvGpuEngine3dReg reg)
|
|
{
|
|
return
|
|
(long)Registers[(int)reg + 0] << 32 |
|
|
(uint)Registers[(int)reg + 1];
|
|
}
|
|
|
|
private void WriteRegister(GpuMethodCall methCall)
|
|
{
|
|
Registers[methCall.Method] = methCall.Argument;
|
|
}
|
|
|
|
private int ReadRegister(NvGpuEngine3dReg reg)
|
|
{
|
|
return Registers[(int)reg];
|
|
}
|
|
|
|
private float ReadRegisterFloat(NvGpuEngine3dReg reg)
|
|
{
|
|
return BitConverter.Int32BitsToSingle(ReadRegister(reg));
|
|
}
|
|
|
|
private bool ReadRegisterBool(NvGpuEngine3dReg reg)
|
|
{
|
|
return (ReadRegister(reg) & 1) != 0;
|
|
}
|
|
|
|
private void WriteRegister(NvGpuEngine3dReg reg, int value)
|
|
{
|
|
Registers[(int)reg] = value;
|
|
}
|
|
}
|
|
}
|