mirrors/Ryujinx
1
0
Fork 0
mirror of https://github.com/Ryujinx/Ryujinx.git synced 2024-12-28 09:26:01 +00:00
Code Issues Releases Activity
Ryujinx/ChocolArm64
History
LDj3SNuD e674b37710 Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. (full FP emu.). Add 4 FP Tests. (#468) 
* Update CpuTest.cs

* Update CpuTestSimd.cs

* Superseded.

* Update AInstEmitSimdCvt.cs

* Update ASoftFloat.cs

* Nit.

* Update PackageReferences.

* Update AInstEmitSimdArithmetic.cs

* Update AVectorHelper.cs

* Update ASoftFloat.cs

* Update ASoftFallback.cs

* Update AThreadState.cs

* Create FPType.cs

* Create FPExc.cs

* Create FPCR.cs

* Create FPSR.cs

* Update ARoundMode.cs

* Update APState.cs

* Avoid an unwanted implicit cast of the operator >= to long, continuing to check for negative values. Remove a leftover.

* Nits.
2018-10-23 11:12:45 -03:00
..
Decoder Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449) 2018-10-13 23:35:16 -03:00
Decoder32 Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
Events Print stack trace on invalid memory accesses (#461) 2018-10-20 22:07:52 +00:00
Exceptions More flexible memory manager (#307) 2018-08-15 15:59:51 -03:00
Instruction Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. (full FP emu.). Add 4 FP Tests. (#468) 2018-10-23 11:12:45 -03:00
Instruction32 Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
Memory Print stack trace on invalid memory accesses (#461) 2018-10-20 22:07:52 +00:00
State Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. (full FP emu.). Add 4 FP Tests. (#468) 2018-10-23 11:12:45 -03:00
Translation Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
ABitUtils.cs Fix/Add 10 Shift Right and Mls_Ve Instructions; add 14 Tests. (#407) 2018-09-08 14:24:29 -03:00
AOpCodeTable.cs Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449) 2018-10-13 23:35:16 -03:00
AOptimizations.cs Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437) 2018-10-05 22:45:59 -03:00
AThread.cs Fix performance regression caused by the new scheduler changes (#422) 2018-09-19 12:16:20 -03:00
ATranslatedSub.cs Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
ATranslatedSubType.cs Initial work to support AArch32 with a interpreter, plus nvmm stubs (not used for now) 2018-05-26 17:50:47 -03:00
ATranslator.cs Remove cold methods from the CPU cache (#224) 2018-09-19 17:07:56 -03:00
ATranslatorCache.cs Tweak cpu cache deletion policy values (#433) 2018-10-07 23:40:37 -03:00
ChocolArm64.csproj Add linux-x64 to RID property to make tests works on linux (#205) 2018-06-30 12:43:04 -03:00