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Ryujinx/ChocolArm64/Instruction
2018-05-23 12:57:28 -03:00
..
AInst.cs
AInstEmitAlu.cs Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104) 2018-04-25 23:20:22 -03:00
AInstEmitAluHelper.cs Fix corner cases of ADCS and SBFM 2018-02-26 15:56:34 -03:00
AInstEmitBfm.cs Fix corner cases of ADCS and SBFM 2018-02-26 15:56:34 -03:00
AInstEmitCcmp.cs
AInstEmitCsel.cs
AInstEmitException.cs Print guest stack trace on a few points that can throw exceptions 2018-04-22 02:48:17 -03:00
AInstEmitFlow.cs Stub a few services, add support for generating call stacks on the CPU 2018-04-22 01:22:46 -03:00
AInstEmitHash.cs Remove unused function from CPU 2018-03-14 00:57:07 -03:00
AInstEmitMemory.cs
AInstEmitMemoryEx.cs
AInstEmitMemoryHelper.cs Improved logging (#103) 2018-04-24 15:57:39 -03:00
AInstEmitMove.cs
AInstEmitMul.cs
AInstEmitSimdArithmetic.cs Add intrinsics support (#121) 2018-05-11 20:10:27 -03:00
AInstEmitSimdCmp.cs Fix wrong type on CMTST instruction 2018-05-23 12:57:28 -03:00
AInstEmitSimdCvt.cs Add scalar variants of FCVTZS/FCVTZU, fix a issue on Ryushader 2018-05-18 14:44:49 -03:00
AInstEmitSimdHelper.cs Add intrinsics support (#121) 2018-05-11 20:10:27 -03:00
AInstEmitSimdLogical.cs Add intrinsics support (#121) 2018-05-11 20:10:27 -03:00
AInstEmitSimdMemory.cs
AInstEmitSimdMove.cs Add intrinsics support (#121) 2018-05-11 20:10:27 -03:00
AInstEmitSimdShift.cs CPU fix for the cases using a Mask with shift = 0 2018-03-14 01:59:22 -03:00
AInstEmitSystem.cs Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count 2018-03-13 21:24:32 -03:00
AInstEmitter.cs
ASoftFallback.cs Add intrinsics support (#121) 2018-05-11 20:10:27 -03:00
ASoftFloat.cs Implement Frsqrte_S (#72) 2018-04-05 20:36:19 -03:00
AVectorHelper.cs Add intrinsics support (#121) 2018-05-11 20:10:27 -03:00